1、 程序
⑴ 四选一通道选择器程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY mux4_1 IS
PORT (sel :IN STD_LOGIC_VECTOR(1 DOWNTO 0);
d0, d1, d2, d3 :IN STD_LOGIC_VECTOR(7 DOWNTO 0);
q :OUT STD_LOGIC_VECTOR(7 DOWNTO 0) );
END mux4_1;
ARCHITECTURE behave OF mux4_1 IS
BEGIN
PROCESS(sel)
BEGIN
IF sel = "00" THEN q <= d0;
ELSIF sel = "01" THEN q <= d1;
ELSIF sel = "10" THEN q <= d2;
ELSIF sel = "11" THEN q <= d3;
END IF;
END PROCESS;
END behave；
⑵ 方波发生模块程序：
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY square IS
PORT(clk, reset : IN STD_LOGIC;
q : OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END square;
ARCHITECTURE behave OF square IS
SIGNAL a : STD_LOGIC;
BEGIN
PROCESS(clk, reset)
VARIABLE tmp : STD_LOGIC_VECTOR(7 DOWNTO 0);
BEGIN
IF reset = '0' THEN a <= '0';
ELSIF clk'EVENT AND clk = '1'THEN
IF tmp = "11111111" THEN tmp := "00000000" ;
ELSE tmp := tmp + 1;
END IF;
IF tmp <= "10000000" THEN a <= '1';
ELSE a <= '0';
END IF;
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