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SFF-9402_R1.1.pdf
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SNIA官方规范,用于标注各种规格接口pinout,以及高速cable互联信号定义。 SFF-9402_R1.1.pdf
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PUBLISHED SFF-9402 Rev 1.1
Multi-Protocol Internal Cable Pinouts for SAS and/ or PCIe Page 1
Copyright © 2019 SNIA. All rights reserved.
SFF-9402
Reference Guide for
Multi-Protocol Internal Cable Pinouts for SAS and/or PCIe
Rev 1.1 October 16, 2019
SECRETARIAT: SFF TA TWG
This specification is made available for public review at http://www.snia.org/sff/specifications. Comments may be submitted at
http://www.snia.org/feedback. Comments received will be considered for inclusion in future revisions of this specification.
ABSTRACT: Industry storage solutions are now implementing both PCIe and SAS within the same or similar enclosures. As there are multiple
standard connectors available for creating internal cable solutions, numerous custom cables solutions have appeared. This reference guide
incorporates pinouts that provide multiprotocol and/ or reversible cable solutions that reduce development/ design time and the resulting increasing
number of custom cables.
The confusion between the CPU centric (PCIe) specification solutions and the drive centric (SAS) specification solutions was eliminated by creating
and employing a common naming convention. The result being that TX is always the input to the cable and RX is always the output from the cable.
The signal direction was also appropriately added to the tables. Table 8-7 has been added illustrating why SAS-2.1 and SAS-3 cables are not
reversible in SAS-4 applications. The pinout solutions begin in Section 6.
This document provides an implementation guide for systems manufacturers, system integrators, and suppliers. This is an internal working document
of the SFF Committee, an industry ad hoc group.
POINTS OF CONTACT:
Jay Neer Mark Andresen Chairman SFF TA TWG
Molex, LLC. Lenovo Email: SFF-Chair@snia.org
2222 Wellington Court 7001 Development Drive
Lisle, IL 60532 Morrisville, NC 27560
Ph: 561-251-8016 Ph: 919-237-8037
Email: jay.neer@molex.com Email: mandresen@lenovo.com
PUBLISHED SFF-9402 Rev 1.1
Multi-Protocol Internal Cable Pinouts for SAS and/ or PCIe Page 2
Copyright © 2019 SNIA. All rights reserved.
Copyright
The SNIA hereby grants permission for individuals to use this document for personal use only, and for corporations and other business entities to
use this document for internal use only (including internal copying, distribution, and display) provided that:
1.
Any text, diagram, chart, table or definition reproduced shall be reproduced in its entirety with no
alteration, and,
2.
Any document, printed or electronic, in which material from this document (or any portion hereof) is
reproduced shall acknowledge the SNIA copyright on that material, and shall credit the SNIA for granting
permission for its reuse.
Other than as explicitly provided above, there may be no commercial use of this document, or sale of any part, or this entire document, or distribution
of this document to third parties. All rights not explicitly granted are expressly reserved to SNIA.
Permission to use this document for purposes other than those enumerated (Exception) above may be requested by e -mailing
copyright_request@snia.org. Please include the identity of the requesting individual and/or company and a brief description of the purpose, nature,
and scope of the requested use. Permission for the Exception shall not be unreasonably withheld. It can be assumed permission is granted if the
Exception request is not acknowledged within ten (10) business days of SNIA's receipt. Any denial of permission for the Exception shall include an
explanation of such refusal.
Disclaimer
The information contained in this publication is subject to change without notice. The SNIA makes no warranty of any kind with regard to this
specification, including, but not limited to, the implied warranties of merchantability and fitness for a particular purpose. The SNIA shall not be liable
for errors contained herein or for incidental or consequential damages in connection with the furnishing, performance, or use of this specification.
Suggestions for revisions should be directed to http://www.snia.org/feedback/.
PUBLISHED SFF-9402 Rev 1.1
Multi-Protocol Internal Cable Pinouts for SAS and/ or PCIe Page 3
Copyright © 2019 SNIA. All rights reserved.
Foreword
The development work on this specification was done by the SNIA SFF TWG, an industry group. Since its formation as the SFF Committee in August
1990, the membership has included a mix of companies which are leaders across the industry.
For those who wish to participate in the activities of the SFF TWG, the signup for membership can be found at http://www.snia.org/sff/join.
Revision History
Rev 0.2
March 1, 2016:
- Introduced as a Reference Guide
Rev 0.5
April 25, 2016:
- Informal work group approved new Sideband assignments for MiniLink and Ultraport SlimSAS™
- Sideband naming revised – removed references to Sidebands 8 and 9, added in the alternate (A Sidebands for 0 and 1)
- Added SClock to Sideband 0 and SLoad to Sideband 1
- Sideband 2 replaced Sideband 8//VSP8 was renamed VSP2
- Sideband 3 replaced Sideband 9//VSP9 was renamed VSP3
Rev 0.6
August 8, 2016:
- Content completely restructured to clarify the presentation of the solutions
- Pinouts did not change from previous revision
- Additional tables provided to separate applications
- Added alternate pinout for legacy PCI Express® REFCLK implementation
Rev 0.7 “(prior to comments)”
September 12, 2016:
- There are “NO” changes to any signal/ pin assignments with this revision
- Section 4 item 6 include SFF-8485 next to SGPIO
- Section 4 item 11 spelled out Vendor Specific Pins to identify the VSP abbreviation
- Section 4 item 12 changed 2-Wire types names from 2-Wire S-Type to Standard 2-Wire Type, 2-Wire A-Type to Other 2-Wire
Type and added definition about signal logic level for the sidebands
- In section 4 item 13 changed Backplane Type to Backplane_Type (BP_Type) to match SFF-8448
- Updated tables (All) signal naming conventions associated with PCIe and SAS
- Updated PCIe only tables to show their naming convention only
- Updated SAS only tables to show their naming convention only
- Changed references from SFF-8612 to SFF-8611
- Renamed Nano-Pitch I/O™ to OCuLink or MiniLink where applicable throughout the document
- Renamed iPass+™ HD to Mini SAS HD or SFF-8643 where applicable throughout the document
- Updated section 6 alternate sideband assignment to include improved board layout
- Added additional description about the use of color coding plus italics to show the difference between the two protocols
- Added definition of NC as “no connect”
- Added SFF-9639 Multifunction 6X Unshielded Connector Pinouts to the reference section
PUBLISHED SFF-9402 Rev 1.1
Multi-Protocol Internal Cable Pinouts for SAS and/ or PCIe Page 4
Copyright © 2019 SNIA. All rights reserved.
Rev 0.7J “(Includes Rev 0.7H plus comment resolutions to create Rev 0.7J (green text))”
December 12, 2016:
- Updated document header information
- Change document to show SNIA format
- Updated Title description
- Changed the word “specification” to “Reference Guide or “document” where applicable throughout to indicate this is a reference
document and not a specification
- Updated Points of Contact
- Added dates to the different Change history rev level
- Updated Forward to reflect SNIA format
- Changes incorporated are editorial clarifications plus the removal of proposed mini-SAS HD Alternate for PCIe cable solutions per
user comment
- Reworded the abstract to clarify the purpose of this Reference Guide
- Removed the Note: Content completely restructured to clarify the presentation of the solutions
- Updated the Rev 0.7 revision section to correct typos
- Section 1 Replaced Purpose with Scope and updated the statement
- Added Section 1.1 Copyright for SNIA format
- Added Section 1.2 Disclaimer for SNIA format
- Section 2.1 Industry Documents, Added SFF-8485, SAS-3, SAS-4, SES-2 and SES-3
- Section 2.2 replaced with sources per SNIA format
- Added Section 2.3 Conventions per SNIA format
- Added Section 2.4 Definitions per SNIA format
- Throughout document changed SFF-8611 to SFF-8621 to include both the fixed (SFF-8612) and free (SFF-8611) interfaces
- Throughout document changed Slimline SAS to SFF-8654
- All the tables and document headings in this document were updated to just show the SFF associated with the connector and
removed the connector names to eliminate any issues with abbreviated trademark names
- Section 4 updated opening sentence
- Section 4 Item 1 defined what is considered Other Protocol (O/P)
- Section 4 Item 2 replaced PCI Express® with Other Protocol implementations
- Section 4 Item 3 defined what connectors are considered Legacy
- Section 4 Item 4 added the word signals after (HCSL)
- Section 4 Item 7 removed must be “SFF-9402 AWARE” and reworded sentence to “implementations must be aware”
- Section 4 Item 10 “New Item/ Definition” now defines signals and convention follow OCuLink specification (Prev. item 10 now 12)
- Section 4 Item 11 “New Item/ Definition” for device connections in tables (Prev. item 11 now 13)
- Section 4 Item 13 (Prev. Item 11) removed PCI Express® and indicated sidebands based on OCuLink and SFF-8448
- Section 4 Item 14 (Prev. Item 12) changed PCIe x8 to Other Protocol (x8) implementations
- Section 4 Item 15 (Prev. Item 13) removed PCI Express® and replaced with OCuLink and Other Protocol
- Section 4 Item 15b (Prev. Item 13b) removed PCI Express® replaced with SFF-8448 to indicate common 2-Wire signals
- Section 4 Item 16 (Prev. Item 14) improved the wording for full crossover cables and replaced specification with reference guide
- Section 4 Item 17 “New item/ Definition” Added definition/ description about 3.3 Vact TX and RX usage
- Section 4 Item 18 “New item/ Definition” Added definition/ description about Power 5V#1/ #2.
- Section 4 Item 19 was Item 15 in the previous level
PUBLISHED SFF-9402 Rev 1.1
Multi-Protocol Internal Cable Pinouts for SAS and/ or PCIe Page 5
Copyright © 2019 SNIA. All rights reserved.
- Section 4 Previous Item 16 about REFCLK optimization was removed
- Section 4 Item 19 (Prev. Item 15) reworded the first part of the sentence
- Section 4 Item 20 (Prev. Item 17) changed legacy to SFF-8087/ SFF-8643 and Slimline SAS to SFF-8654
- Section 4 Item 21 combined old Item 18 and 19 define the use of OCuLink signal naming convention
- Section 4 Added Item 22 about CWAKE# / OBFF implementation
- Section 4 Added Item 23 about CPERST# implementation
- Section 5 Updated opening sentence such that references to x8 SFF-8621 or SFF-8654 are considered Other Protocol
- Section 5 Second paragraph grammar correction added associated prior to (PERST[A,B]#/ CPRSNT[A,B]#)
- Section 5 Third paragraph removed PCI Express® and replaced with OCuLink/ Other Protocol
- Section 5 Third paragraph changed state about reserve pins as no connects to “NO WIRE” Power pins being “NO WIRE”
- Section 5 Item 1 replaced PCI Express® with OCuLink and Other Protocol where applicable
- Section 5 Item 2 replaced PCI Express® (x8) with Other Protocol (x8)
- Section 5 Item 2a replaced “It is still recommended that pins associated with” with “must be” for the diff pairs
- Section 5 Item 3 replaced PCI Express® (x8) with Other Protocol
- Table 5-1 Removed references to x8 PCIe, PCI Express® with the exception of the U.2 device
- Table 5-1 Changed Device columns to SFF-8639/ U.2 connector versus SFF-8639 Module and MultiLink
- Table 5-1 Changed the endpoint high speed naming convention to match the OCuLink specification
- Table 5-1 Changed NC to NO WIRE and changed the reserve pins for OCuLink to the Power pins called out in OCuLink specification
external only
- Table 5-1 Arrows cover SAS, OCuLink and Other Protocol. Dots were changed to dashes.
- Table 5-1 VSP+/- must be updated in OCuLink Specification
- Table 5-1 CWAKE#/OBFF (VSP) must be reflected in OCuLink
- Table 5-2 Removed references to x8 PCIe, PCI Express® with the exception of the U.2 device
- Table 5-2 Changed Device columns to SFF-8639/ U.2 connector versus SFF-8639 Module and MultiLink
- Table 5-2 Changed the endpoint high speed naming convention to match OCuLink/ Other Protocol
- Table 5-2 Changed NC to NO WIRE and changed the reserve pins for Other Protocol to the Power names for external only
- Table 5-2 Removed double ground assignments A19 and B19 in tables
- Table 5-2 Arrows cover SAS, and Other Protocol. Dots were changed to dashes
- Table 5-2 VSP+/- must be reflected in Other Protocol
- Table 5-2 CWAKE#/OBFF (VSP) must be reflected in OCuLink Specification
- Table 5-3 Removed references to x8 PCIe, PCI Express® with the exception of the U.2 device
- Table 5-3 Changed Device columns to SFF-8639/ U.2 connector versus SFF-8639 Module and MultiLink
- Table 5-3 Changed the endpoint high speed naming convention to match OCuLink/ Other Protocol
- Table 5-3 Changed NC to NO WIRE and changed the reserve pins for Other Protocol to the Power names for external only
- Table 5-3 Double ground assignments A19 and B19 still required for Y-cables
- Table 5-3 Arrows cover SAS, and Other Protocol. Dots were changed to dashes
- Table 5-3 VSP+/- must be reflected in Other Protocol
- Section 6 Heading - removed PCI Express® replaced with OCuLink and added Other Protocol (O/P)
- Section 6 Opening sentence removed PCI Express® added (O/P)
- Section 6 First paragraph (Prev. version), about the alternate sideband pin assignments was removed
- Section 6 First paragraph (Second in Prev. version) removed PCI Express® and reworded the description about the highlighted
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