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RTL8211F-CG RTL8211FD-CG

RTL8211FI-CG RTL8211FDI-CG

INTEGRATED 10/100/1000M ETHERNET

TRANSCEIVER

DATASHEET

(CONFIDENTIAL: Development Partners Only)

Rev. 1.1

21 February 2014

Track ID: JATR-8275-15

Realtek Semiconductor Corp.

No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan

Tel.: +886-3-578-0211 Fax: +886-3-577-6047

www.realtek.com

RTL8211F(I)/RTL8211FD(I)

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

iii

Track ID: JATR-8275-15 Rev. 1.1

Table of Contents

1. GENERAL DESCRIPTION..............................................................................................................................................1

2. FEATURES.........................................................................................................................................................................2

3. SYSTEM APPLICATIONS...............................................................................................................................................3

3.1. APPLICATION DIAGRAM - RTL8211F(I) ......................................................................................................................3

3.2. APPLICATION DIAGRAM - RTL8211FD(I) ...................................................................................................................4

4. BLOCK DIAGRAM...........................................................................................................................................................5

5. PIN ASSIGNMENTS .........................................................................................................................................................6

5.1. PACKAGE IDENTIFICATION...........................................................................................................................................6

6. PIN DESCRIPTIONS ........................................................................................................................................................7

6.1. TRANSCEIVER INTERFACE............................................................................................................................................7

6.2. CLOCK .........................................................................................................................................................................7

6.3. RGMII.........................................................................................................................................................................8

6.4. MANAGEMENT INTERFACE...........................................................................................................................................8

6.5. RESET ..........................................................................................................................................................................9

6.6. MODE SELECTION ........................................................................................................................................................9

6.7. LED DEFAULT SETTINGS ...........................................................................................................................................10

6.8. REGULATOR AND REFERENCE....................................................................................................................................10

6.9. POWER AND GROUND ................................................................................................................................................10

7. FUNCTION DESCRIPTION ..........................................................................................................................................11

7.1. TRANSMITTER ............................................................................................................................................................11

7.1.1. 1000Mbps Mode...................................................................................................................................................11

7.1.2. 100Mbps Mode.....................................................................................................................................................11

7.1.3. 10Mbps Mode.......................................................................................................................................................11

7.2. RECEIVER...................................................................................................................................................................11

7.2.1. 1000Mbps Mode...................................................................................................................................................11

7.2.2. 100Mbps Mode.....................................................................................................................................................11

7.2.3. 10Mbps Mode.......................................................................................................................................................12

7.3. ENERGY EFFICIENT ETHERNET (EEE)........................................................................................................................12

7.4. WAKE-ON-LAN (WOL)............................................................................................................................................12

7.5. INTERRUPT .................................................................................................................................................................13

7.6. INTB/PMEB PIN USAGE ...........................................................................................................................................13

7.7. MDI INTERFACE ........................................................................................................................................................14

7.8. HARDWARE CONFIGURATION ....................................................................................................................................15

7.9. LED AND PHY ADDRESS CONFIGURATION ...............................................................................................................16

7.10. GREEN ETHERNET (1000/100MBPS MODE ONLY) .....................................................................................................17

7.10.1. Cable Length Power Saving ............................................................................................................................17

7.10.2. Register Setting................................................................................................................................................17

7.11. MAC/PHY INTERFACE ..............................................................................................................................................18

7.11.1. RGMII..............................................................................................................................................................18

7.11.2. Management Interface .....................................................................................................................................18

7.11.3. Change Page ...................................................................................................................................................19

7.11.4. Access to MDIO Manageable Device (MMD).................................................................................................20

7.12. AUTO-NEGOTIATION..................................................................................................................................................20

7.12.1. Auto-Negotiation Priority Resolution..............................................................................................................23

RTL8211F(I)/RTL8211FD(I)

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

Track ID: JATR-8275-15 Rev. 1.1

7.12.2. Auto-Negotiation Master/Slave Resolution .....................................................................................................23

7.12.3. Auto-Negotiation PAUSE/ASYMMETRIC PAUSE Resolution........................................................................24

7.13. CROSSOVER DETECTION AND AUTO-CORRECTION ....................................................................................................24

7.14. LED CONFIGURATION................................................................................................................................................26

7.14.1. Customized LED Function...............................................................................................................................26

7.14.2. EEE LED Function ..........................................................................................................................................27

7.15. POLARITY CORRECTION .............................................................................................................................................28

7.16. POWER .......................................................................................................................................................................28

7.17. PHY RESET (HARDWARE RESET) ..............................................................................................................................28

8. REGISTER DESCRIPTIONS.........................................................................................................................................29

8.1. REGISTER MAPPING AND DEFINITIONS.......................................................................................................................29

8.2. MMD REGISTER MAPPING AND DEFINITIONS............................................................................................................30

8.3. OTHER PAGE REGISTER MAPPING AND DEFINITIONS .................................................................................................30

8.4. REGISTER TABLES......................................................................................................................................................30

8.4.1. BMCR (Basic Mode Control Register, Address 0x00) .........................................................................................30

8.4.2. BMSR (Basic Mode Status Register, Address 0x01).............................................................................................32

8.4.3. PHYID1 (PHY Identifier Register 1, Address 0x02) ............................................................................................33

8.4.4. PHYID2 (PHY Identifier Register 2, Address 0x03) ............................................................................................33

8.4.5. ANAR (Auto-Negotiation Advertising Register, Address 0x04) ...........................................................................33

8.4.6. ANLPAR (Auto-Negotiation Link Partner Ability Register, Address 0x05) .........................................................34

8.4.7. ANER (Auto-Negotiation Expansion Register, Address 0x06).............................................................................35

8.4.8. ANNPTR (Auto-Negotiation Next Page Transmit Register, Address 0x07) .........................................................36

8.4.9. ANNPRR (Auto-Negotiation Next Page Receive Register, Address 0x08)...........................................................36

8.4.10. GBCR (1000Base-T Control Register, Address 0x09).....................................................................................37

8.4.11. GBSR (1000Base-T Status Register, Address 0x0A) .......................................................................................37

8.4.12. MACR (MMD Access Control Register, Address 0x0D) .................................................................................38

8.4.13. MAADR (MMD Access Address Data Register, Address 0x0E)......................................................................38

8.4.14. GBESR (1000Base-T Extended Status Register, Address 0x0F) .....................................................................39

8.4.15. INER (Interrupt Enable Register, Address 0x12) ............................................................................................39

8.4.16. PHYCR1 (PHY Specific Control Register 1, Address 0x18)............................................................................40

8.4.17. PHYCR2 (PHY Specific Control Register 2, Address 0x19)............................................................................41

8.4.18. PHYSR (PHY Specific Status Register, Address 0x1A) ...................................................................................41

8.4.19. INSR (Interrupt Status Register, Address 0x13) ..............................................................................................42

8.4.20. EPAGSR (Extension Page Select Register, Address 0x1F) .............................................................................43

8.4.21. PC1R (PCS Control 1 Register, MMD Device 3, Address 0x00) ....................................................................43

8.4.22. PS1R (PCS Status1 Register, MMD Device 3, Address 0x01) ........................................................................43

8.4.23. EEECR (EEE Capability Register, MMD Device 3, Address 0x14)................................................................44

8.4.24. EEEWER (EEE Wake Error Register, MMD Device 3, Address 0x16) ..........................................................44

8.4.25. EEEAR (EEE Advertisement Register, MMD Device 7, Address 0x3c) ..........................................................44

8.4.26. EEELPAR (EEE Link Partner Ability Register, MMD Device 7, Address 0x3d) ............................................45

8.4.27. LCR (LED Control Register, ExtPage 0xd04, Address 0x10) .........................................................................45

8.4.28. EEELCR (EEE LED Control Register, ExtPage 0xd04, Address 0x11)..........................................................45

9. REGULATORS AND POWER SEQUENCE................................................................................................................46

9.1. SWITCHING REGULATOR (RTL8211F(I))...................................................................................................................46

9.1.1. PCB Layout ..........................................................................................................................................................46

9.1.2. Inductor and Capacitor Parts List .......................................................................................................................47

9.1.3. Measurement Criteria ..........................................................................................................................................48

9.1.4. Efficiency Measurement .......................................................................................................................................54

9.2. LOW-DROPOUT REGULATOR (RTL8211FD(I)) ..........................................................................................................55

9.3. POWER SEQUENCE .....................................................................................................................................................56

10. CHARACTERISTICS.................................................................................................................................................57

RTL8211F(I)/RTL8211FD(I)

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

Track ID: JATR-8275-15 Rev. 1.1

10.1. ABSOLUTE MAXIMUM RATINGS.................................................................................................................................57

10.2. RECOMMENDED OPERATING CONDITIONS .................................................................................................................57

10.3. CRYSTAL REQUIREMENTS ..........................................................................................................................................58

10.4. OSCILLATOR/EXTERNAL CLOCK REQUIREMENTS ......................................................................................................58

10.5. DC CHARACTERISTICS...............................................................................................................................................59

10.6. AC CHARACTERISTICS...............................................................................................................................................60

10.6.1. MDC/MDIO Timing ........................................................................................................................................60

10.6.2. RGMII Timing Modes......................................................................................................................................61

11. MECHANICAL DIMENSIONS.................................................................................................................................64

11.1. MECHANICAL DIMENSIONS NOTES ............................................................................................................................64

12. ORDERING INFORMATION...................................................................................................................................65

List of Tables

TABLE 1. TRANSCEIVER INTERFACE ..............................................................................................................................................7

TABLE 2. CLOCK............................................................................................................................................................................7

TABLE 3. RGMII ...........................................................................................................................................................................8

TABLE 4. MANAGEMENT INTERFACE.............................................................................................................................................8

TABLE 5. RESET.............................................................................................................................................................................9

TABLE 6. MODE SELECTION ..........................................................................................................................................................9

TABLE 7. LED DEFAULT SETTINGS .............................................................................................................................................10

TABLE 8. REGULATOR AND REFERENCE ......................................................................................................................................10

TABLE 9. POWER AND GROUND...................................................................................................................................................10

TABLE 10. CONFIG PINS VS. CONFIGURATION REGISTER............................................................................................................15

TABLE 11. CONFIGURATION REGISTER DEFINITIONS ....................................................................................................................15

TABLE 12. MANAGEMENT FRAME FORMAT ..................................................................................................................................18

TABLE 13. MANAGEMENT FRAME DESCRIPTION...........................................................................................................................18

TABLE 14. 1000BASE-T BASE AND NEXT PAGE BIT ASSIGNMENTS..............................................................................................21

TABLE 15. LED DEFAULT DEFINITIONS........................................................................................................................................26

TABLE 16. LED REGISTER TABLE.................................................................................................................................................26

TABLE 17. LED CONFIGURATION TABLE......................................................................................................................................27

TABLE 18. REGISTER ACCESS TYPES ............................................................................................................................................29

TABLE 19. REGISTER MAPPING AND DEFINITIONS ........................................................................................................................29

TABLE 20. MMD REGISTER MAPPING AND DEFINITIONS..............................................................................................................30

TABLE 21. OTHER PAGE REGISTER MAPPING AND DEFINITIONS...................................................................................................30

TABLE 22. BMCR (BASIC MODE CONTROL REGISTER, ADDRESS 0X00) ......................................................................................30

TABLE 23. BMSR (BASIC MODE STATUS REGISTER, ADDRESS 0X01)..........................................................................................32

TABLE 24. PHYID1 (PHY IDENTIFIER REGISTER 1, ADDRESS 0X02) ...........................................................................................33

TABLE 25. PHYID2 (PHY IDENTIFIER REGISTER 2, ADDRESS 0X03) ...........................................................................................33