AEC - Q104 - REV-
September 14, 2017
Page 1 of 25
Component Technical Committee
Automotive Electronics Council
FAILURE MECHANISM BASED STRESS TEST QUALIFICATION
FOR MULTI-CHIP MODULES (MCM)
1. SCOPE
This document contains a set of failure mechanism based stress tests and defines the minimum stress
test driven qualification requirements and references test conditions for qualification of multichip
modules (MCM). A single MCM consists of multiple electronic components enclosed in a single
package (refer to Section 1.3.5) that perform an electronic function.
This document applies only to MCMs which are designed to be soldered directly to a printed circuit
board assembly.
MCM types not included in the scope of this document include the following:
• Two assembly components or MCMs that a Tier 1 / original equipment manufacturers
(OEM) assembles onto a system.
• Light Emitting Diodes (LEDs), which are covered by AEC-Q102.
• MEMs, which are covered by AEC-Q103 Qualification document.
• Power MCMs may require specific considerations and qualification test procedures that
are outside the scope of this document. A power MCM consists of multiple active power
devices (i.e., IGBTs, power MOSFETs, diodes) and, if necessary, additional passive
devices (e.g., temperature sensors, capacitors), which are integrated on a substrate.
• Solid State Drives (SSD).
• MCMs with exterior connectors that are not soldered to a board or other assembly.
For MCM with embedded firmware, the firmware is considered an integral part of the MCM. As such,
it is qualified as part of the overall system methodology, which is dependent on the type of MCM.
Standalone qualification of the firmware itself is not in the scope of this document.
1.1 Purpose
The purpose of this specification is to determine that a MCM is capable of passing the specified stress
tests and thus can be expected to give a certain level of quality/reliability in the application.
1.2 Reference Documents
Current revision of the referenced documents will be in effect at the date of agreement to the
qualification plan. Subsequent qualification plans will automatically use updated revisions of these
referenced documents.
1.2.1 Automotive
AEC-Q100 Failure Mechanism Based Stress Test Qualification for Integrated Circuits
AEC-Q100-001 Wire Bond Shear Test
AEC-Q100-004 IC Latch-up Test
AEC-Q100-005 Non-Volatile Memory Program/Erase Endurance, Data Retention and
Operational Life Test
AEC-Q100-007 Fault Simulation and Fault Grading
AEC-Q100-009 Electrical Distribution Assessment
AEC-Q100-010 Solder Ball Shear Test
AEC-Q101 Failure Mechanism Based Stress Test Qualification for Discrete
Semiconductors
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