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Order No.: 332464-014
Revision: 3.5
February 2018
Intel
®
Ethernet Controller X710/
XXV710/XL710 Datasheet
Ethernet Networking Division (ND)
Legal Lines and Disclaimers
2
No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.
Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a
particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in
trade.
This document contains information on products, services and/or processes in development. All information provided here is subject
to change without notice. Contact your Intel representative to obtain the latest forecast, schedule, specifications and roadmaps.
The products and services described may contain defects or errors which may cause deviations from published specifications.
Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548-4725
or by visiting www.intel.com/design/literature.htm.
Intel and the Intel logo are trademarks of Intel Corporation in the U.S. and/or other countries.
* Other names and brands may be claimed as the property of others.
© 2018 Intel Corporation.
Front Matter — Ethernet Controller X710/XXV710/XL710
3
Revision History
Revision Date Notes
3.5 February 2018 Removed references to 802.1BR.
3.4 January 2018 Changing branding string from 710 Series to X710/XXV710/XL710.
3.3 September 2017 Updated Table 14-5 (Proposed Flash Device; Winbond Flash device part number).
3.2 September 2017 Initial Release (Intel Public).
3.1 June 2017 Sections revised:
13.5.2 (VCCD connectivity).
Tables revised:
2-14 (Integrated SVR pins).
2-16 (Pull-up and pull-down resistors).
B-16 (Integrated SVR pins).
3.0 April 2017 Sections revised:
• 2.2.3 (NC-SI interface pins).
• 2.2.11 (Power supply pins).
• 13.2.2 (Recommended Operating Conditions).
Table revised:
• B-20 (0.86V External AVDD power supply specification).
2.9 March 2017 Sections revised:
• 2.2.11 (Power supply pins).
• 13.2.1 (Absolute Maximum Ratings).
• 13.2.2 (Recommended Operating Conditions).
• 13.5.2 (VCCD connectivity).
• B.3.6 (Mechanical package).
• B.10 (Power Supplies).
• B.10.1 (Power Supply Sequencing; updated figure).
• B.10.2 (Power Supply Filtering).
Figure removed:
• Figure B.2 (AVDD power noise mask).
Table revised:
• 13-4 (External VCCD Power Supply Specification).
• B-20 (0.86V External AVDD power supply specification).
• B-20 (1.00V External AVDD power supply specification).
• B-28 (Minimum Number of Bypass Capacitors Per Power Rail).
2.8 January 2017 • Removed Section 6.3.16. Duplication of Section 6.3.15.
2.7 December 2016 •Added Intel
®
Ethernet Controller XXV710-specific information.
2.6 December 2016 • Added 25 Gb/s functionality.
Ethernet Controller X710/XXV710/XL710 — Front Matter
4
2.5 March 2016
• Reflects the latest X710/XXV710/XL710 firmware release (FVL5).
• Removed all references to FCoE. X710/XXV710/XL710 does not support FCoE.
• Removed all references to Storm Control.
• Added GLPRT_ERRBC and GLPRT_MSPDC register information.
Sections added:
• 14.12.3 (POR without power cycle for NVM update).
Sections revised:
• 5.2.2 (PCIe link power management; removed ASPM statements).
• 7.7.1.2.2 (Normal Partitioning of Rx Packet Buffer; setting a null low watermark is not
allowed).
• 7.11.3 (Statistics Consistency Rules; added debug register description).
• 8.4.3.1.2 (Transmit Queue Disable Flow; updated cross reference).
• 10.2.2.2.44 (PCIe PM Support - GLPCI_PMSUP (0x000BE4B0; RO); changed bit
settings to reserved).
• 10.2.2.16.32 (Port Unicast Packets Received Count High; updated description for bits
15:0).
• 11.3.5.7 (Link Capabilities Register (0xAC; RO); updated description for bits 11:10).
• 15.10 (Common application schematic; changed pin Y19 to Y17).
Table revised:
13-16 (t
CSS
value).
13-22 (Duty cycle value).
2.4 October 2015 Sections revised:
• 6.3.12.5 and 6.3.12.6 (added Combo Image Version offset information).
• 6.3.16.12.3 (changed Length default value to 0x10).
• 14.5 (SVR Board Connectivity Guidelines).
• 14.6.5.2 (Clock Generator Specification description and note).
Table revised:
• 16-1 (TDP specification).
2.3 July 2015 Fourth Release (Intel Public).
2.2 May 2015 Third Release (Intel Public).
2.1 December 2014 Second Release (Intel Public).
2.0 July 2014 Initial Release (Intel Public).
Revision Date Notes
Introduction — Ethernet Controller X710/XXV710/XL710
5
1.0 Introduction
This document describes the external architecture (including device operation, pin descriptions, register
definitions, etc.) for the Intel
®
Ethernet Controller X710/XXV710/XL710 (X710/XXV710/XL710), a
dual-port 40 Gigabit Ethernet (GbE), dual-port 25 GbE
1
, or quad-port 10 GbE Network Interface
Controller. It reflects the silicon device capability while the Intel
®
Ethernet Controller X710/XXV710/
XL710 Feature Support Matrix reflects the features and interfaces actually supported in the NVM and
software (http://www.intel.com/content/www/us/en/embedded/products/networking/xl710-ethernet-
controller-feature-matrix.html).
This document is intended as a reference for architects, logic designers, firmware and software device
driver developers, board designers, test engineers, or anyone else who might need specific technical or
programming information about the X710/XXV710/XL710.
The X710/XXV710/XL710 combines standard Ethernet stateless Network Interface Card (NIC) and
Internet Small Computer System Interface (iSCSI) block storage acceleration functionality into a single
silicon device. It is designed to address the target markets listed in Table 1-1.
Note: The X710/XXV710/XL710 does NOT support Fibre Channel over Ethernet (FCoE).
As shown in Figure 1-1, the X710/XXV710/XL710 is targeted for use in rack mounted or pedestal
servers, where it can be deployed as an add-in NIC or LAN on Motherboard (LOM). Some types of
Ethernet cables, such as SFP+ direct attach, can be driven directly by the X710/XXV710/XL710, while
other types, such as 10GBASE-T, require the external Physical Layer (PHY) component(s) shown. The
X710/XXV710/XL710 can connect up to four Ethernet ports or it can be configured to connect two 40
GbE ports. The X710/XXV710/XL710 is also targeted for use in blade servers, where it can be deployed
as a mezzanine card or LOM. The X710/XXV710/XL710 supports direct connection to backplanes that
support the following signaling standards: 40GBASE-KR4 (up to two ports) or 1000BASE-KX (up to four
ports supported).
Blade backplanes typically connect Ethernet controllers in a dual-redundant star to two separate
Ethernet switches. In this configuration, the X710/XXV710/XL710 can be connected with up to 2 x 10
GbE ports per switch or 1 x 40 GbE port per switch.
1. Pinout and mechanical specifications for the Intel
®
Ethernet Controller XXV710 (XXV710) are described in
Appendix B.
Table 1-1. X710/XXV710/XL710 target markets
Description
Cloud networking — In the emerging cloud networking market, where computing infrastructure and software are
sold as services, and where the large data centers of Internet portal companies such as Google*, Microsoft* and
Amazon* drive unique requirements, the X710/XXV710/XL710 has these strengths: networking performance,
energy efficiency, automation (including resource provisioning and monitoring, and workload balancing),
sophisticated packet header parsing, and quality open source drivers.
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