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LPDDR4_JESD209-4
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This document defines the LPDDR4 standard, including features, functionalities, AC and DC characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16x2channel SDRAM devices. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3 (JESD79-3), DDR4 (JESD79-4), LPDDR (JESD209), LPDDR2 (JESD209-2) and LPDDR3 (JESD209-3).
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JEDEC SOLID STATE TECHNOLOGY ASSOCIATION
AUGUST 2014
JEDEC
STANDARD
Low Power Double Data Rate 4
JESD209-4
(LPDDR4)
NOTICE
JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the
JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel.
JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings
b
etween manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the
purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC
members, whether the standard is to be used either domestically or internationally.
JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents
or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor
does it assume any obligation whatever to parties adopting the JEDEC standards or publications.
The information included in JEDEC standards and publicati
ons represents a sound approach to product specification
and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization
there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an
ANSI standard.
No claims to be in conformance with this standard may be made unless all requirements stated in the standard are
met.
Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be
addressed to JEDEC at the address below, or refer to www.jedec.org
under Standards and Documents for alternative
contact information.
Published by
©JEDEC Solid State Technology Association 2014
3103 North 10th Street
Suite 240 South
Arlington, VA 22201-2107
This document may be downloaded free of charge; however JEDEC retains the
copyright on this material. By downloading this file the individual agrees not to
charge for or resell the resulting material.
PRICE: Contact JEDEC
PLEASE!
DON'T VIOLATE
THE
LAW!
This document is copyrighted by the JEDEC and may not be
reproduced without permission.
For information, contact:
JEDEC Solid State Technology Association
3103 North 10th Street, Suite 240 South
Arlington, Virginia 22201-2107
or refer to www.jedec.org under Standards-Documents/Copyright Information
JEDEC Standard No. 209-4
Page 1
LOW POWER DOUBLE DATA RATE 4 (LPDDR4)
(From JEDEC Board Ballot JCB-14-41, formulated under the cognizance of the JC-42.6 Subcommittee on
Low Power Memories.)
1Scope
This document defines the LPDDR4 standard, including features, functionalities, AC and DC
characteristics, packages, and ball/signal assignments. The purpose of this specification is to define the
minimum set of requirements for JEDEC compliant 4 Gb through 32 Gb for x16x2channel SDRAM
devices. This document was created using aspects of the following standards: DDR2 (JESD79-2), DDR3
(JESD79-3), DDR4 (JESD79-4), LPDDR (JESD209), LPDDR2 (JESD209-2) and LPDDR3 (JESD209-3).
Each aspect of the standard was considered and approved by committee ballot(s). The accumulation of
these ballots was then incorporated to prepare the LPDDR4 standard.
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