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Freescale Semiconductor
Data Sheet: Product Preview
Document Number: IMX6ULCEC
Rev. A, 01/2015
Package Information
Plastic Package
BGA 14 x 14 mm, 0.8 mm pitch
Ordering Information
See Table 1 on page 3
© 2015 Freescale Semiconductor, Inc. All rights reserved.
Freescale Confidential Proprietary—NDA Required
Preliminary—Subject to Change Without Notice
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
1 i.MX 6UltraLite Introduction
The i.MX 6UltraLite is a high performance, ultra
efficient processor family with featuring Freescale’s
advanced implementation of the single ARM
Cortex
®
-A7 core, which operates at speeds of up to 528
MHz. i.MX 6UltraLite includes integrated power
management module that reduces the complexity of
external power supply and simplifies the power
sequencing. Each processor in this family provides
various memory interfaces, including 16-bit LPDDR2,
DDR3, DDR3L, Raw and Managed NAND flash, NOR
flash, eMMC, QSPI SPI, and a wide range of other
interfaces for connecting peripherals, such as WLAN,
Bluetooth™, GPS, displays, and camera sensors.
The i.MX 6UltraLite processors are specifically useful
for applications such as:
• Electronics Point-of-Sale device
• Telematics
i.MX 6UltraLite
Applications Processors
1. i.MX 6UltraLite Introduction . . . . . . . . . . . . . . . . . . . . . . . 1
1.1. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 3
1.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1. Special Signal Considerations . . . . . . . . . . . . . . . 16
3.2. Recommended Connections for Unused Analog
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1. Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . 18
4.2. Power Supplies Requirements and Restrictions . 25
4.3. Integrated LDO Voltage Regulator Parameters . . 26
4.4. PLL’s Electrical Characteristics . . . . . . . . . . . . . . 28
4.5. On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . 29
4.6. I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . 30
4.7. I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . 34
4.8. Output Buffer Impedance Parameters . . . . . . . . . 37
4.9. System Modules Timing . . . . . . . . . . . . . . . . . . . 40
4.10. General-Purpose Media Interface (GPMI) Timing 56
4.11. External Peripheral Interface Parameters . . . . . . 64
4.12. A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
5. Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 96
5.1. Boot Mode Configuration Pins . . . . . . . . . . . . . . . 96
5.2. Boot Device Interface Allocation . . . . . . . . . . . . . 98
6. Package Information and Contact Assignments . . . . . 104
6.1. 14x14 mm Package Information . . . . . . . . . . . . 104
7. Revision History 124
i.MX 6UltraLite Applications Processors, Rev. A
2 Freescale Confidential Proprietary—NDA Required Freescale Semiconductor, Inc.
Preliminary—Subject to Change Without Notice
i.MX 6UltraLite Introduction
• IoT Gateway
• Access control panels
• Human Machine Interfaces (HMI)
• Smart appliances
• Industrial control and automation
The features of the i.MX 6UltraLite processors include:
• Single-core ARM Cortex-A7—single core can provide a more cost-effective and more
power-efficient solution.
• Multilevel memory system—The multilevel memory system of each processor is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processors support
many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR
Flash, NAND Flash (MLC and SLC), OneNAND™, Quad SPI, and managed NAND, including
eMMC up to rev 4.4/4.41/4.5.
• Smart speed technology—Power management implemented throughout the IC that enables
multimedia features and peripherals to consume minimum power in both active and various low
power modes.
• Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices
by scaling the voltage and frequency to optimize performance.
• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a
multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a programmable
smart DMA (SDMA) controller, an asynchronous audio sample rate converter, and an
Pixel-processing pipeline (PXP) to support 2D image processing, including color-space
conversion, scaling, alpha-blending, and rotation.
• 2x Ethernet interfaces—2x 10/100 Mbps Ethernet controllers.
• Human-machine interface—Each processor supports only one digital parallel display interface.
• Interface flexibility—Each processor supports connections to a variety of interfaces: two
high-speed USB on-the-go with PHY, multiple expansion card ports (high-speed MMC/SDIO host
and other), two 12-bit ADC modules with up to 10 total input channels, two CAN ports, two smart
card interfaces compatible with EMV Standard v4.3, and a variety of other popular interfaces (such
as UART, I
2
C, and I
2
S serial audio).
• Advanced security—The processors deliver hardware-enabled security features that enable secure
e-commerce, digital rights management (DRM), information encryption, On-The-Fly DRAM
encryption, secure boot, and secure software downloads. The security features are discussed in
detail in the i.MX 6UltraLite Security Reference Manual (IMX6ULSRM).
• Integrated power management—The processors integrate linear regulators and internally generate
voltage levels for different domains. This significantly simplifies system power management
structure.
For a comprehensive list of the i.MX 6UltraLite features, see Section 1.2, “Features”.
i.MX 6UltraLite Introduction
i.MX 6UltraLite Applications Processors, Rev. A
Freescale Semiconductor, Inc. Freescale Confidential Proprietary—NDA Required 3
Preliminary—Subject to Change Without Notice
1.1 Ordering Information
Table 1 provides examples of orderable sample part numbers covered by this data sheet.
Figure 1 describes the part number nomenclature so that the users can identify the characteristics of the
specific part number they have (for example, cores, frequency, temperature grade, fuse options, and silicon
revision). The primary characteristic which describes which data sheet applies to a specific part is the
temperature grade (junction) field.
• The i.MX 6UltraLite Applications Processors for Consumer Products data sheet (IMX6ULCEC)
covers parts listed with a “D (Commercial temp)” or “E (Extended Commercial temp)”
• The i.MX 6UltraLite Applications Processors for Industrial Products data sheet (IMX6ULIEC)
covers parts listed with “C (Industrial temp)”
Ensure to have the proper data sheet for specific part by verifying the temperature grade (junction) field
and matching it to the proper data sheet. If there will be any questions, visit the web page
freescale.com/imx6series or contact a Freescale representative for details.
Table 1. Ordering information
Part Number Feature Package
Junction
Temperature T
j
(C)
MCIMX6G0CVM05AA Single Core, 528 MHZ 14 x 14 mm, 0.8 pitch, BGA 0 to +95
MCIMX6G1CVM05AA Single Core, 528 MHz 14 x 14 mm, 0.8 pitch, BGA -40 to +105
MCIMX6G2CVM05AA Single Core, 528 MHz 14 x 14 mm, 0.8 pitch, BGA -40 to +105
MCIMX6G3CVM05AA Single Core, 528 MHz 14 x 14 mm, 0.8 pitch, BGA -40 to +105
i.MX 6UltraLite Applications Processors, Rev. A
4 Freescale Confidential Proprietary—NDA Required Freescale Semiconductor, Inc.
Preliminary—Subject to Change Without Notice
i.MX 6UltraLite Introduction
Figure 1. Part Number Nomenclature—i.MX 6UltraLite
1.2 Features
The i.MX 6UltraLite processors are based on ARM Cortex-A7 MPCore™ Platform, which has the
following features:
• Supports single ARM Cortex-A7 MPCore (with TrustZone), with:
— 32 KByte L1 Instruction Cache
— 32 KByte L1 Data Cache
— Private Timer and Watchdog
— Cortex-A7 NEON MPE (Media Processing Engine) Co-processor
• General Interrupt Controller (GIC) with 128 interrupts support
• Global Timer
• Snoop Control Unit (SCU)
• 128 KB unified I/D L2 cache
• Two Master AXI bus interfaces output of L2 cache
Part differentiator
@
Security 3
General Purpose 2 (Full Feature) 2
General Purpose 1 (Reduced Feature) 1
Baseline 0
Junction Temperature (Tj)
+
Consumer: 0 to + 95C D
Industrial: -40 to +105C C
Auto: -40 to + 125C A
ARM Cortex-A7 Frequency $$
528 MHz 05
300 MHz 03
Package Type
ROHS
MAPBGA 14x14 0.8mm VM
Qualification Level MC
Prototype Samples PC
Mass Production MC
Special SC
i.MX 6 Family X
i.MX 6 G
Silicon Rev A
Rev 1.1 B
Rev 1.0 A
Fuse Option %
Reserved A
MC IMX6 X @ + VV $$ % A
Table yy
i.MX 6UltraLite
i.MX 6UltraLite Introduction
i.MX 6UltraLite Applications Processors, Rev. A
Freescale Semiconductor, Inc. Freescale Confidential Proprietary—NDA Required 5
Preliminary—Subject to Change Without Notice
• Frequency of the core (including Neon and L1 cache), as per Table 9, "Operating Ranges," on page
20.
• NEON MPE coprocessor
— SIMD Media Processing Architecture
— NEON register file with 32x64-bit general-purpose registers
— NEON Integer execute pipeline (ALU, Shift, MAC)
— NEON dual, single-precision floating point execute pipeline (FADD, FMUL)
— NEON load/store and permute pipeline
— 32 double-precision VFPv3 floating point registers
The SoC-level memory system consists of the following additional components:
— Boot ROM, including HAB (96 KB)
— Internal multimedia / shared, fast access RAM (OCRAM, 128 KB)
— Secure/non-secure RAM (32 KB)
• External memory interfaces: The i.MX 6UltraLite processors support latest, high volume, cost
effective handheld DRAM, NOR, and NAND Flash memory standards.
— 16-bit LP-DDR2-800, 16-bit DDR3-800 and LV-DDR3-800
— 8-bit NAND-Flash, including support for Raw MLC/SLC, 2 KB, 4 KB, and 8 KB page size,
BA-NAND, PBA-NAND, LBA-NAND, OneNAND™ and others. BCH ECC up to 40 bits.
— 16/8-bit NOR Flash. All EIMv2 pins are muxed on other interfaces.
Each i.MX 6UltraLite processor enables the following interfaces to external devices (some of them are
muxed and not available simultaneously):
•Displays:
— One parallel display port, support max 85 MHz display clock and up to WXGA (1366x768) at
60 Hz
— Support 24-bit, 18-bit, 16-bit, and 8-bit parallel display
• Camera sensors:
— One parallel camera port, up to 24 bit and 238 MHz pixel clock
— Support 24-bit, 16-bit, 10-bit, and 8-bit input
— Support BT.656 interface
• Expansion cards:
— Two MMC/SD/SDIO card ports all supporting:
– 1-bit or 4-bit transfer mode specifications for SD and SDIO cards up to UHS-I SDR-104
mode (104 MB/s max)
– 1-bit, 4-bit, or 8-bit transfer mode specifications for MMC cards up to 52 MHz in both SDR
and DDR modes (104 MB/s max)
•USB:
— Two high speed (HS) USB 2.0 OTG (Up to 480 Mbps), with integrated HS USB Phy
• Miscellaneous IPs and interfaces:
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