PCIE-OCULINKCABLEPRODUCTSPEC_oculink

PCIE

8GT/S

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Rev 0.9 r2 03022015

PCI Express OCuLink

Specification

Revision 0.9, Version r2 03022015

March 2, 2015

PCI Express OCuLink

Table of Contents

Introduction to PCI Express OCuLink .................................................................................. 1

1.1. Reference Documents...................................................................................................................... 1

1.2. Documentation Conventions ........................................................................................................... 2

Capitalization and Italicization ................................................................................................................. 2

1.2.1.

Numbers and Number Bases .................................................................................................................... 2

1.2.2.

Implementation Notes ............................................................................................................................. 2

1.2.3.

1.3. Terms and Acronyms ....................................................................................................................... 2

PCI Express OCuLink Overview ........................................................................................... 4

2.1. Mechanical Overview....................................................................................................................... 4

2.2. Internal and External Cable Overview ............................................................................................. 5

2.2.1. Internal and External Cable scope .............................................................................................................. 5

2.2.1.1.

Internal Cables .................................................................................................................................. 5

2.2.1.2.

External Cables .................................................................................................................................. 5

2.3. Signal Description ......................................................................................................................... 6

2.3. Signal Compatibility Matrix .............................................................................................................. 7

PCI Express Interconnect Overview .................................................................................... 9

3.1. Lane Numbering and Pin Numbering for x4 Connector Solutions ................................................... 9

Connector Pin-out for External Applications.......................................................................................... 10

3.1.1.

Connector Pin-out for Internal Applications .......................................................................................... 13

3.1.2.

3.2. Port and Cable Aggregation ........................................................................................................... 14

x4 Host and Peripheral Fixed Host Board-side Connector Aggregation ................................................. 14

3.2.1.

x4 Host and Peripheral Fixed Host Board-side Connector Aggregation Positioning Requirements ...... 14

3.2.2.

Additional Requirements for Aggregating Cables .................................................................................. 16

3.2.3.

x4 Fixed Host Board-side Connectors ............................................................................... 17

4.1. x4 Fixed Host Board-side Vertical Connector ................................................................................ 17

4.2. x4 Fixed Host Board-side Vertical Connector .................................................................................. 18

4.3. x4 Fixed Host Board-side Right Angle Connector ............................................................................ 25

4.4. x4 Fixed Host Board-side Connector Latching ................................................................................ 31

5. x4 Free Cable-side Connector .................................................................................................. 32

x4 Free Cable Assemblies .................................................................................................. 35

6.1. x4 Free Cable Assembly Attributes ................................................................................................ 35

Figure 6-1. ................................................................................................................................................ 35

x4 Passive Free Cable Solution Attributes .............................................................................................. 35

6.1.1.

x4 Active Free Cable Assembly Attributes .............................................................................................. 36

6.1.2.

6.2. x4 Free Internal Cable Specification .............................................................................................. 37

PCI Express OCuLink

iii

x4 Free Internal Straight-out Cable Exit Assembly Form Factor............................................................. 37

6.2.1.

x4 Free Internal Right-angle Down Cable Exit Assembly Form Factor ................................................... 38

6.2.2.

x4 Free Internal Cable Assembly Physical and Mechanical Performance .............................................. 39

6.2.3.

6.3. x4 Free External Passive Latch Cable Assembly Physical Form Factor .......................................... 40

6.4. x4 Free External Active Latch Cable Assembly Physical Form Factor ............................................ 41

6.5. x4 Free External Cable Assembly Physical and Mechanical Performance ....... Error! Bookmark not

defined.

6.6. Latching for All x4 Free Cable Assemblies...................................................................................... 43

Passive Latching for All x4 Free Cable Assemblies ................................................................................. 44

6.6.1.

Active Latching for All x4 Free Cable Assemblies ................................................................................... 45

6.6.2.

6.7. Free Cable Assembly Wiring Charts .......................................... Error! Bookmark not defined.

6.8. Memory Map .................................................................................................................................... 53

6.9. Performance Requirements for Connectors and Cables ............................................................... 54

Electrical Topologies and Link Definitions ........................................................................ 57

7.1. Electrical Topologies and Link Definitions ..................................................................................... 57

Topologies .............................................................................................................................................. 58

7.1.1.

Link Definitions ...................................................................................................................................... 59

7.1.2.

7.2. Link Measurement Points .............................................................................................................. 59

7.3. Cable Electrical Specifications ........................................................................................................ 60

Characteristic Impedance and Reference Impedance ........................................................................... 60

7.3.1.

Cable Assembly Insertion Loss ............................................................................................................... 60

7.3.2.

Cable Assembly Differential Return Loss ............................................................................................... 63

7.3.3.

Differential to common-mode return loss ............................................................................................. 64

7.3.4.

Differential to Common-mode Conversion Loss minus Insertion Loss .................................................. 65

7.3.5.

Common-mode to Common-mode Return Loss .................................................................................... 65

7.3.6.

Connector/Cable Crosstalk ..................................................................................................................... 65

7.3.7.

7.3.8.

Connector/Cable Lane-to-Lane Skew ..................................................................................................... 66

7.3.9.

7.4. TRL Cable Compliance Board Trace (CCB) De-embedding. ............................................................ 67

CCB TRL Traces ....................................................................................................................................... 67

7.4.1.

Cable Compliance Board Through Line .................................................................................................. 68

7.4.2.

Cable Compliance Board Reflect Line ..................................................................................................... 69

7.4.3.

Cable Compliance Secondary Lines ........................................................................................................ 69

7.4.4.

Cable Compliance Load Line................................................................................................................... 69

7.4.5.

Building TRL Lines ................................................................................................................................... 69

7.4.6.

Calculating TRL Secondary Line Lengths ................................................................................................ 69

7.4.7.

TRL Calibration Guidelines (Based on Micro-strip MEG6 Stack-up) ...................................................... 72

7.4.8.

OCuLink x4 Cable Connector and Enclosure Labeling ...................................................... 73

9. OCuLink x4 Implementation Guide ......................................................................................... 74

9.1 Enclosure/I/O Bracket Opening for x4 Fixed External Connectors ................................................ 74

PCI Express OCuLink

9.2. Clearance Requirements for OCuLink x4 External Connectors and Cables for Enclosures and

PCIe Add-in Cards ........................................................................................................................... 75

Appendix A.

Cable Management ......................................................................................... 78

A.1.

Lower Page Memory Map................................................................................................. 79

A.1.1.

Identifier............................................................................................................................ 79

A.1.2.

Status ................................................................................................................................ 80

A.1.3.

Password Change and Entry ............................................................................................. 80

A.1.4.

Page Select ........................................................................................................................ 80

A.2. Upper Page Memory Map ................................................................................................................ 81

A.1.5.

Identifier............................................................................... Error! Bookmark not defined.

A.1.6.

Extended Identifier ........................................................................................................... 83

A.1.7.

Cable Technology .............................................................................................................. 83

A.1.8.

Vendor Name .................................................................................................................... 85

A.1.9.

PCI-SIG Vendor ID ............................................................................................................. 85

A.1.10.

Vendor Part Number ......................................................................................................... 85

A.1.11.

Vendor Revision ................................................................................................................ 85

A.1.12.

Copper Cable Attenuation ................................................................................................ 85

A.1.13.

Vendor Serial Number ...................................................................................................... 85

Appendix B - Memory Map ........................................................................................................... 86

B.1. Interface Protocol ......................................................................................................................... 86

B.1.1.

Operational States and State Transition ............................................................................................... 86

B.1.1.1.

Start ....................................................................................................................................................... 86

B.1.1.2.

Stop ....................................................................................................................................................... 86

B.1.1.3

Acknowledge ....................................................................................................................................... 86

B.1.1.4

Clock Stretching ..................................................................................................................................... 86

B.1.2

Reset (Management Interface Only) ...................................................................................................... 87

B.1.2.1.

Power On Reset ...................................................................................................................................... 87

B.1.2.2.

Protocol Reset ........................................................................................................................................ 87

B.1.3. Format 87

B.1.3.1.

Control.................................................................................................................................................... 87

B.1.3.2.

Address and Data ................................................................................................................................... 88

B.2 Read/Write Operations .................................................................................................................. 89

B.2.1

Slave Memory Address Counter (Read/Write Operations) .................................................................... 89

B.2.2.

Write Operations (Byte Write) ............................................................................................................... 89

B.2.3.

Write Operations (Sequential Write) ..................................................................................................... 90

B.2.4.

Write Operations (Acknowledge Polling) ............................................................................................... 91

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