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首页Verilog-AMS语言参考手册
Verilog-AMS和VHDL-AMS出现还不到4年,是一种新的标准。作为硬件行为级的建模语言,Verilog-AMS和VHDL-AMS分别是Verilog和VHDL的超集,而Verilog-A则是Verilog-AMS的一个子集。 Verilog-AMS硬件描述语言是符合IEEE 1364标准的Verilog HDL的1个子集。它覆盖了由OVI组织建议的Verilog HDL的定义和语义,目的是让数模混合信号集成电路的设计者,既能用结构描述又能用高级行为描述来创建和使用模块。所以,用Verilog HDL语言可以使设计者在整个设计过程的不同阶段(从结构方案的分析比较,直到物理器件的实现),均能使用不同级别的抽象。
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Verilog-AMS
Language Reference Manual
Version 2.4.0
May 30, 2014

Accellera
Analog and Mixed-signal Extensions to Verilog HDL Version 2.4.0, May 30, 2014
ii Copyright © 2014 Accellera Systems Initiative. All rights reserved.
Copyright
©
2014 Accellera Systems Initiative. All rights reserved.
Accellera Systems Initiative Inc., 1370 Trancas Street #163, Napa, CA 94558, USA
Verilog
®
is a registered trademark of Cadence Design Systems, Inc.
Notices
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ously received formal consideration.

Accellera
Version 2.4.0, May 30, 2014 V
ERILOG-AMS
Copyright © 2014 Accellera Systems Initiative.
iii
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Suggestions for improvements to the Verilog-AMS Language Reference Manual are welcome. They should
be sent to the Verilog-AMS e-mail reflector
v-ams@lists.accellera.org
Note: Attention is called to the possibility that implementation of this standard may require use of subject
matter covered by patent rights. By publication of this standard, no position is taken with respect to the
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identifying patents for which a license may be required by an Accellera standard or for conducting inquiries
into the legal validity or scope of those patents that are brought to its attention.

Accellera
Analog and Mixed-signal Extensions to Verilog HDL Version 2.4.0, May 30, 2014
iv Copyright © 2014 Accellera Systems Initiative. All rights reserved.
The following people contributed to the creation, editing, and review of this document.
The following people have made contributions to previous versions of this document.
Scott Little, Intel Corporation, Chair
Martin O’Leary, Qualcomm, Vice-Chair
David Miller, Freescale Semiconductor, Technical Editor, Secretary
Chandrashekar Chetput, Cadence Design Systems Inc.
Kenneth Bakalar, Mentor Graphics
Martin Barnasconi, NXP Semiconductors
Xavier Bestel, Mentor Graphics
Shalom Bresticker, Intel Corporation
Kevin Cameron, Synopsys
James Cavanaugh, Intel Corporation
Srikanth Chandrasekaran, IEEE
Geoffrey Coram, Analog Devices
Dave Cronauer, Synopsys
Paul Floyd, Atrenta Inc.
Bob Floyd, Independent Consultant
Graham Helwig, ASTC
Junwei Hou, Cadence Design Systems Inc.
Robert Hughes, Intel Corporation
Marq Kole, NXP Semiconductors
Abhi Kolpekwar, Cadence Design Systems Inc.
Top Lertpanyavit, Intel Corporation
Scott Morrison, Texas Instruments
Patrick O’Halloran, Tiburon Design Automation
Farzin Rasteh, Synopsys
George Tipple, Intel Corporation
Alessandro Valerio, STMicroelectronics
Martin Vlach, Mentor Graphics
Ian Wilson, Mentor Graphics
Ramana Aisola
Andre Baguenier
Jim Barby
Graham Bell
William Bell
Ed Chang
Joe Daniels
Jonathan David
Al Davis
Raphael Dorado
John Downey
Dan FitzPatrick
Vassilios Gerousis
Ian Getreu
Kim Hailey
Steve Hamm
William Hobson
Dick Klaassen
Ken Kundert
Laurent Lemaitre
Oskar Leuthold
S. Peter Liebmann
Colin McAndrew
Steve Meyer
Marek Mierzwinski
Ira Miller
Michael Mirmak
John Moore
Arpad Muranyi
Don O'Riordan
Jeroen Paasschens
Rick Poore
Tom Reeder
Steffen Rochel
Jon Sanders
David Sharrit
John Shields
James Spoto
Stuart Sutherland
Prasanna Tamhankar
Richard Trihy
Yatin Trivedi
Boris Troyanovsky
Don Webber
Frank Weiler
Ilya Yusim
Alex Zamfirescu
Amir Zarkesh
David Zweidinger

Accellera
Version 2.4.0, May 30, 2014 V
ERILOG-AMS
Copyright © 2014 Accellera Systems Initiative.
i
Table of Contents
1. Verilog-AMS introduction......................................................................................................................... 1
1.1 Overview.......................................................................................................................................... 1
1.2 Mixed-signal language features....................................................................................................... 1
1.3 Systems............................................................................................................................................ 2
1.3.1 Conservative systems.......................................................................................................... 2
1.3.2 Kirchhoff’s Laws ................................................................................................................ 4
1.3.3 Natures, disciplines, and nets.............................................................................................. 5
1.3.4 Signal-flow systems............................................................................................................ 5
1.3.5 Mixed conservative/signal flow systems ............................................................................ 6
1.4 Conventions used in this document ................................................................................................. 8
1.5 Contents ........................................................................................................................................... 9
2. Lexical conventions ................................................................................................................................. 11
2.1 Overview........................................................................................................................................ 11
2.2 Lexical tokens................................................................................................................................ 11
2.3 White space.................................................................................................................................... 11
2.4 Comments...................................................................................................................................... 11
2.5 Operators........................................................................................................................................ 11
2.6 Numbers......................................................................................................................................... 12
2.6.1 Integer constants ............................................................................................................... 13
2.6.2 Real constants ................................................................................................................... 15
2.7 String literals.................................................................................................................................. 16
2.8 Identifiers, keywords, and system names ......................................................................................17
2.8.1 Escaped identifiers............................................................................................................ 17
2.8.2 Keywords .......................................................................................................................... 17
2.8.3 System tasks and functions ............................................................................................... 17
2.8.4 Compiler directives........................................................................................................... 18
2.9 Attributes ....................................................................................................................................... 19
2.9.1 Syntax................................................................................................................................ 20
2.9.2 Standard attributes............................................................................................................. 23
3. Data types ................................................................................................................................................ 24
3.1 Overview........................................................................................................................................ 24
3.2 Integer and real data types ............................................................................................................. 24
3.2.1 Output variables................................................................................................................ 25
3.3 String data type.............................................................................................................................. 25
3.4 Parameters...................................................................................................................................... 27
3.4.1 Type specification............................................................................................................. 28
3.4.2 Value range specification..................................................................................................29
3.4.3 Parameter units and descriptions....................................................................................... 30
3.4.4 Parameter arrays................................................................................................................ 30
3.4.5 Local parameters............................................................................................................... 30
3.4.6 String parameters .............................................................................................................. 31
3.4.7 Parameter aliases............................................................................................................... 31
3.4.8 Multidimensional parameter array examples.................................................................... 32
3.5 Genvars.......................................................................................................................................... 33
3.6 Net_discipline................................................................................................................................ 34
3.6.1 Natures .............................................................................................................................. 34
3.6.2 Disciplines...............................................................................................................
.......... 37
3.6.3 Net discipline declaration.................................................................................................. 41
3.6.4 Ground declaration............................................................................................................ 43
3.6.5 Implicit nets....................................................................................................................... 43
3.7 Real net declarations...................................................................................................................... 44
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