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ICN6211 Specification V0.4
- 1 -
ICN6211 Specification
MIPI
®
DSI BRIDGE TO RGB output
Revision 0.4
NOTICE NOTICENOTICENOTICENOTICE
This design and all of its related documentation constitutes valuable and confidential
property of Chipone Technology (Beijing) Co., Ltd. It is licensed for use as expressly
stated in the written license Agreement between Chipone Technology (Beijing) Co.,
Ltd and its customers. Any other use or redistribution of this design and all related
documentation is expressly prohibited.
This design and all related documentation have been released by Chipone Technology
(Beijing) Co., Ltd to its customers under a Non Disclosure Agreement (NDA).
Disclosure of this design outside of this agreement is expressly prohibited.
NOTICE NOTICENOTICENOTICENOTICE
Chipone Technology (Beijing) Co., Ltd
13
th
Floor, Test Tower, Building 4, 31 Middle North Third Ring Rd.,
Haidian District, Beijing, 100088
PRC
Contact: Simon Liu
Email: simon_liu@chiponeic.com
ICN6211 Specification V0.4
- 2 -
Revision History
Rev
Date
Author
Description
0.1
2014-03-25
Simon_Liu
Initial version
0.2
2014-04-23
Simon_Liu
1. Update pin diagram and pin description
2. Add FRC/Hi-FRC function
3. Add RGB out clock phase control description
0.3
2014-06-19
Simon_Liu
Update package diagram
0.4
2014-07-04
Simon_Liu
VDD2 & VDD3 should be in same domain.
ICN6211 Specification V0.4
- 3 -
Table of Contents
1 Introduction ................................................................................................................ - 5 -
1.1 Feature List ............................................................................................................................................ - 5 -
2 Functional Block Diagram ........................................................................................ - 6 -
3 System Application Diagram .................................................................................... - 7 -
4 Pin Diagram ................................................................................................................ - 8 -
5 Pin Description ........................................................................................................... - 9 -
6 Function Description ................................................................................................ - 11 -
6.1 MIPI Receiver ...................................................................................................................................... - 11 -
6.1.1 DSI Lane Merging ................................................................................................................................. - 11 -
6.1.2 DSI Pixel Stream Packets ...................................................................................................................... - 11 -
6.1.3 DSI Video Transmission sequence ........................................................................................................ - 13 -
6.2 RGB output .......................................................................................................................................... - 15 -
6.3 RGB Clock phase adjust ..................................................................................................................... - 16 -
6.4 Bist mode .............................................................................................................................................. - 16 -
6.5 FRC/Hi-FRC function ......................................................................................................................... - 17 -
6.6 DSI access local registers .................................................................................................................... - 17 -
6.6.1 Write local registers .............................................................................................................................. - 17 -
6.6.2 Read local registers ............................................................................................................................... - 17 -
6.7 I2C access local registers .................................................................................................................... - 18 -
7 DC and AC Electrical Characteristics ................................................................... - 19 -
7.1 ABSOLUTE MAXIMUM RATING .................................................................................................. - 19 -
7.2 RECOMMENDED OPERATING CONDITIONS .......................................................................... - 19 -
7.3 Electrical Characteristics.................................................................................................................... - 20 -
7.3.1 MIPI DSI INTERFACE ........................................................................................................................ - 20 -
7.3.2 RGB output ........................................................................................................................................... - 21 -
7.4 SWITCHING CHARACTERISTICS ............................................................................................... - 21 -
8 Package information ................................................................................................ - 23 -
Important Notice .................................................................................................................... - 24 -
ICN6211 Specification V0.4
- 4 -
Table of figures
Figure 2-1 ICN6211 function block diagram ..................................................................................................... - 6 -
Figure 3-1 ICN6211 system application diagram ............................................................................................... - 7 -
Figure 4-1 ICN6211 QFN48 pin diagram (Top View) ....................................................................................... - 8 -
Figure 6-1 DSI multi-lanes HS Transmission Example ................................................................................... - 11 -
Figure 6-2 DSI RGB666 Color format, Loosely Long Packet ......................................................................... - 12 -
Figure 6-3 DSI RGB666 Color format, Tightly Long Packet .......................................................................... - 12 -
Figure 6-4 DSI RGB888 Color format, Long Packet ....................................................................................... - 12 -
Figure 6-5 Non-Burst Mode with Sync Pulses ................................................................................................. - 13 -
Figure 6-6 Non-Burst Mode with Sync Events ................................................................................................ - 13 -
Figure 6-7 Burst mode ...................................................................................................................................... - 14 -
Figure 6-8 RGB output clock phase delay ........................................................................................................ - 16 -
Figure 6-9 Bist mode pattern sequence ............................................................................................................ - 16 -
Figure 7-1 DSI HS UI timing definition ........................................................................................................... - 20 -
Figure 7-2 DSI HS/LP signaling and Contention Voltage................................................................................ - 21 -
Figure 7-3 RGB output timing ......................................................................................................................... - 22 -
Figure 7-4 Power on and RESET and ULPS timing ........................................................................................ - 22 -
ICN6211 Specification V0.4
- 5 -
1 Introduction
ICN6211 is a bridge chip which receives MIPI
®
DSI inputs and sends RGB outputs.
MIPI
®
DSI supports up to 4 lanes and each lane operates at 1Gbps maximum; the totally maximum input
bandwidth is 4Gbps; and the MIPI defined ULPS(ultra-low-power state) is also supported. ICN6211 decodes
MIPI
®
DSI 16bpp RGB565 and 18bpp RGB666 and 24bpp RGB888 packets.
The RGB output 18 or 24 bits pixel with pixel clock range of 25MHz to 154MHz.
ICN6211 support video resolution up to FHD (1920x1080) and WUXGA(1920x1200).
ICN6211 adopts QFN48 pins package.
1.1 Feature List
Supports MIPI
®
D-PHY Version 1.00.00 and MIPI
®
DSI Version 1.02.00.
Single Channel DSI Receiver with One, Two, Three and Four lanes configurable, each lanes operates up to
1Gbps.
Receives 16bpp RGB565 and 18bpp RGB666 and 24bpp RGB888 packets defined by DSI.
Supports MIPI Low State, Ultra-Low Power State, Shut Down mode.
Output RGB with pixel clock range of 25MHz to 154MHz.
RGB output supports flexible swap.
Can adjust RGB Clock output phase(with 1/4, 1/2, 3/4 and fine adjust option) .
Provides FRC/Hi-FRC function to improve 18bpp image performance.
power supply : 1.8V/2.5V/3.3V for RGB output; 1.8V/2.5V/3.3V for MIPI and digital IO.
provide I2C slave interface.
package: QFN48-pins with e-pad.
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