SPI总线的官方协议手册_at25xxx读写程序 - CSDN文库

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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its

products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,

including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in

different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s

technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as

components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the

Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized

application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses,

and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges

that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal

Opportunity/Affirmative Action Employer.

DOCUMENT NUMBER

S12SPIV3/D

1

©Motorola, Inc., 2001

SPI

Block Guide

V03.06

Original Release Date: 21 JAN 2000

Revised: 04 FEB 2003

Motorola, Inc.

SPI Block Guide V03.06

2

Revision History

Version

Number

Revision

Date

Effective

Date

Author Description of Changes

0.1

21 Jan

2000

This spec is based on the Barracuda, with modiﬁcations to change

the module from 16 bit to 8 bit.

0.2

1 Mar

2000

Template of this document changed as per Version 2.0 SRS.

0.3

14 Jun

2000

- Signal names are changed as per the SRS2.0

- SPE bit remains set in the Mode Fault error case

- Slave SPI does not support div2 and div4 cases

0.4

31 Aug

2000

- Electrical spec added

- SPIF ﬂag is cleared by a read access to the status register

followed by read access to the data register.

0.5

13 Mar

2001

13 Mar

2001

- Incorporated feedback regarding format of the document.

0.6

13 Mar

2001

19 Mar

2001

- Incorporated changes as a result of internal discussions and

clariﬁcation of SRS2

0.7

6 July

2001

6 July

2001

- Line is added with respect to SPTEF bit to make spec more clear.

- Landscape pages have been removed from pdf.

- Extra blank pages have been removed.

0.8

19 July

2001

19 July

2001

- Line is added with respect to SPE bit to make spec more clear.

V02.02

26 July

2001

-Added Document Names

-variable deﬁnitions and Names have been hidden

-Changed chapter 3.9 Errata to Note

V03.00

27 Sep

2001

27 Sep

2001

Based on the BUG version V02.02 an improved version was

created. The speciﬁcation counter has to be increased, because

there is a difference in the behavior in SPI master mode from this

speciﬁcation to its predecessor. In SPI Master Mode, the change of

a conﬁg bit during a transmission in progress, will abort the

transmission and force the SPI into idle state.

V03.01

14 Dec

2001

14 Dec

2001

Section 4.4.2

- Changed description of transfer format CPHA=0 in slave mode

Section 4.4.3

- Changed description of transfer format CPHA=1 in master mode

- Changed Figure 4-3

Section 4.6.2

- Added note for mode fault in bidirectional master mode

Section 4.7.1

- Changed description of bidirectional mode with mode fault

Section 4.8.3

- Changed last sentence in stop mode description

V03.02

07 Jan

2002

07 Jan

2002

Section 3.3.4

- Changed description of SPTEF ﬂag

Section 4.1

- Changed description of SPTEF ﬂag and SPIDR behaviour

SPI Block Guide V03.06

5

Table of Contents

Section 1 Introduction

1.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

1.3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Section 2 External Signal Description

2.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2 Detailed Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2.1 MOSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2.2 MISO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2.3 SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.2.4 SCK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Section 3 Memory Map/Register Definition

3.1 Register Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1.1 SPI Control Register 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1.2 SPI Control Register 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1.3 SPI Baud Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.1.4 SPI Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.1.5 SPI Data Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Section 4 Functional Description

4.1 General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.2 Master Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

4.3 Slave Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.4 Transmission Formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.4.1 Clock Phase and Polarity Controls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.4.2 CPHA = 0 Transfer Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.4.3 CPHA = 1 Transfer Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4.5 SPI Baud Rate Generation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.6 Special Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.6.1 SS Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.6.2 Bidirectional Mode (MOMI or SISO). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

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