5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC1V8
VCC3V3
POWER ON RESET
JTAG 0 0
01
0
1
1
1
MIO[3] =0 ----JTAG/NAND/Quad-SPI/SD
NAND
QSPI-FLASH
SD Card
BOOT OPTION
MIO[8] =1 ----MIO bank1 voltage=1.8V
(QSPI_D3)
MIO[5]
(QSPI_D2 )
MIO[4]
MIO[7] =0 ----MIO bank0 voltage=3.3V
Boot Mode
MIO[6] =0 ----PLL used
MIO[2] =0 ----cascaded JTAG
ALINX Confidential
Http://www.heijin.org
PS_POR_B
PS_SRST_B
PHY1_TXCK
PHY1_TXD0
PHY1_TXD1
PHY1_TXD2
PHY1_TXD3
PHY1_TXCTL
PHY1_RXCK
PHY1_RXD0
PHY1_RXD1
PHY1_RXD2
PHY1_RXD3
PHY1_RXCTL
OTG_DATA4
OTG_DIR
OTG_STP
OTG_NXT
OTG_DATA0
OTG_DATA1
OTG_DATA2
OTG_DATA3
OTG_CLK
OTG_DATA5
OTG_DATA6
OTG_DATA7
MMC_CMD
MMC_DAT1
MMC_DAT2
MMC_DAT3
PHY1_MDC
PHY1_MDIO
PS_POR_B
PS_MIO7
QSPI_SCK
PS_MIO8
QSPI_D0
QSPI_D1
QSPI_CS
QSPI_D0
QSPI_D1
QSPI_SCK
QSPI_D2
QSPI_D3
PS_MIO7
PS_MIO8
PS_MIO9
PS_MIO10
PS_MIO11
PS_MIO12
PS_MIO13
UART_RXD
UART_TXD
PS_SRST_B
SD_CLK
SD_CMD
SD_D0
SD_D1
SD_D2
SD_D3
MMC_DAT0
QSPI_D3
QSPI_D2
MMC_CCLK
+3.3V
+3.3V
+3.3V+3.3V
+3.3V
+1.8V
+1.8V
+1.8V
+3.3V
OTG_STP
11
OTG_NXT
11
OTG_DATA0
11
OTG_DATA1
11
OTG_DATA2
11
OTG_DATA3
11
OTG_CLK
11
OTG_DATA5
11
OTG_DATA6
11
OTG_DATA7
11
PHY1_MDC
11
PHY1_MDIO
11
MIO0_LED
2
QSPI_SCK
10
QSPI_D3
10
QSPI_D2
10
QSPI_D0
10
QSPI_D1
10
QSPI_CS
10
UART_TXD
12
PS_MIO7
11
PS_MIO9
11
PS_MIO12
11
PS_MIO13
11
PS_MIO10
11
PS_MIO11
11
PS_MIO8
11
SD_CLK
11
SD_CMD
11
SD_D0
11
SD_D1
11
SD_D2
11
SD_D3
11
OTG_DIR
11
OTG_DATA4
11
PHY1_RXCTL
11
PHY1_RXD3
11
PHY1_RXD2
11
PHY1_RXD1
11
PHY1_RXD0
11
PHY1_RXCK
11
PHY1_TXCTL
11
PHY1_TXD3
11
PHY1_TXD2
11
PHY1_TXD1
11
PHY1_TXD0
11
PHY1_TXCK
11
UART_RXD
12
MMC_CCLK
10
MMC_CMD
10
MMC_DAT0
10
MMC_DAT1
10
MMC_DAT2 10
MMC_DAT3 10
Title
Size Document Number Rev
Date: Sheet
of
AC7021核心板 Schematics
1.0
PAGE03 Z7 MIO-Config
312Monday, September 25, 2017
Title
Size Document Number Rev
Date: Sheet
of
AC7021核心板 Schematics
1.0
PAGE03 Z7 MIO-Config
312Monday, September 25, 2017
Title
Size Document Number Rev
Date: Sheet
of
AC7021核心板 Schematics
1.0
PAGE03 Z7 MIO-Config
312Monday, September 25, 2017
C5
4.7uF
R14 33R
C13
10nF
R11 20K
BANK500
U1B
XC7Z020-2CLG484
VCC_MIO0_500_1
B3
VCC_MIO0_500_2
C6
PS_CLK_500
F7
PS_POR_B_500
B5
PS_MIO0_500
G6
PS_MIO1_500
A1
PS_MIO2_500
A2
PS_MIO3_500
F6
PS_MIO4_500
E4
PS_MIO5_500
A3
PS_MIO6_500
A4
PS_MIO7_500
D5
PS_MIO8_500
E5
PS_MIO9_500
C4
PS_MIO10_500
G7
PS_MIO11_500
B4
PS_MIO12_500
C5
PS_MIO13_500
A6
PS_MIO14_500
B6
PS_MIO15_500
E6
R9 20K
R77 20K
C12
100uF
R10 20K
C6
470nF
R20
10K 1%
R76 20K
R12 20K
C8
0.1uF
C166
4.7uF
X1
33.333333Mhz
OE
1
GND
2
OUT
3
VDD
4
C7
470nF
BANK501
U1C
XC7Z020-2CLG484
VCC_MIO1_501_1
A10
VCC_MIO1_501_2
B13
VCC_MIO1_501_3
D9
VCC_MIO1_501_4
E12
PS_MIO_VREF_501
F8
PS_SRST_B_501
C9
PS_MIO16_501
D6
PS_MIO17_501
E9
PS_MIO18_501
A7
PS_MIO19_501
E10
PS_MIO20_501
A8
PS_MIO21_501
F11
PS_MIO22_501
A14
PS_MIO23_501
E11
PS_MIO24_501
B7
PS_MIO25_501
F12
PS_MIO26_501
A13
PS_MIO27_501
D7
PS_MIO28_501
A12
PS_MIO29_501
E8
PS_MIO30_501
A11
PS_MIO31_501
F9
PS_MIO32_501
C7
PS_MIO33_501
G13
PS_MIO34_501
B12
PS_MIO35_501
F14
PS_MIO36_501
A9
PS_MIO37_501
B14
PS_MIO38_501
F13
PS_MIO39_501
C13
PS_MIO40_501
E14
PS_MIO41_501
C8
PS_MIO42_501
D8
PS_MIO43_501
B11
PS_MIO44_501
E13
PS_MIO45_501
B9
PS_MIO46_501
D12
PS_MIO47_501
B10
PS_MIO48_501
D11
PS_MIO49_501
C14
PS_MIO50_501
D13
PS_MIO51_501
C10
PS_MIO52_501
D10
PS_MIO53_501
C12
U3
TCM811TERCTR
GND
1
#RESET
2
#MR
3
VDD
4
R19
4.7K
R78
10K
SW1
SW DIP-2
R17
1K 1%
R75
10K
C167
470nF
R8 20K
C11
470nF
R72 40.2 1%
R13 33R
C10
470nF
C4
100uF
R18
1K 1%
R65 40.2 1%
C14
0.1uF
KEY1
POR RST
C9
4.7uF
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