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Computer Systems Architecture A Networking Approach Second Edition Rob Williams
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Computer Systems
Architecture
A Networking Approach
Second Edition
Rob Williams
WillaFMv3.qxd 11/30/07 10:15 AM Page iii
Pearson Education Limited
Edinburgh Gate
Harlow
Essex CM20 2JE
England
and Associated Companies around the world
Visit us on the World Wide Web at:
www.pearsoned.co.uk
First published 2001
Second edition 2006
© Pearson Education Limited 2001, 2006
The right of Rob Williams to be identified as author of
this work has been asserted by him in accordance with
the Copyright, Designs and Patents Act 1988.
All rights reserved; no part of this publication may be reproduced, stored
in a retrieval system, or transmitted in any form or by any means, electronic,
mechanical, photocopying, recording, or otherwise without either the prior
written permission of the Publishers or a licence permitting restricted copying
in the United Kingdom issued by the Copyright Licensing Agency Ltd,
90 Tottenham Court Road, London W1T 4LP.
All trademarks used herein are the property of their respective owners. The use
of any trademark in this text does not vest in the author or publisher any trademark
ownership rights in such trademarks, nor does the use of such trademarks imply any
affiliation with or endorsement of this book by such owners.
ISBN: 978-0-321-34079-5
British Library Cataloguing in Publication Data
A catalogue record for this book is available from the British Library.
Library of Congress Cataloging-in-Publication Data
Williams, Rob, 1948–
Computer systems architecture : a networking approach / Rob Williams. — 2nd ed.
p. cm.
Includes bibliographical references and index.
ISBN-13: 978-0-321-34079-5
ISBN-10: 0-321-34079-5
1. Computer architecture. 2. Computer network architectures. I. Title.
QA76.9.A73W545 2006
004.2’2—dc22
2006049522
10 9 8 7 6 5 4 3 2
10 09 08 07
Typeset by 71
Printed and bound by Ashford Colour Press Ltd, Gosport
Preface
WillaFMv3.qxd 11/28/07 9:18 AM Page iv
Preface xiii
Preface to the first edition xv
Recommended lab sessions xxi
Part 1 Basic functions and facilities of a computer
Introduction: the hardware–software interface 3
1.1 Computer systems – the importance of networking 4
1.2 Hardware and software – mutual dependence 5
1.3 Programming your way into hardware – VHDL, a language for
electronic engineers 6
1.4 Systems administration – we all need to know 9
1.5 Voice, image and data – technological convergence 9
1.6 Windowing interfaces – WIMPs 11
1.7 The global Internet – connecting all the networks 13
1.8 Using the PC – a case study; more reasons to study CSA 16
The von Neumann Inheritance 23
2.1 Base 2 – the convenience of binary – 10110011100011110000 24
2.2 Stored program control – general-purpose machines 24
2.3 Instruction codes – machine action repertoire 26
2.4 Translation – compilers and assemblers 28
2.5 Linking – bringing it all together 28
2.6 Interpreters – executing high-level commands 30
2.7 Code sharing and reuse – let’s not write it all again! 31
2.8 Data codes – numeric and character 32
2.9 The operating system – Unix and Windows 36
2.10 Client–server computing – the way of the Net 40
2.11 Reconfigurable hardware – an alternative to fetch–execute 42
Contents
1
2
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Functional units and the fetch–execute cycle 47
3.1 The naming of parts – CPU, memory, IO units 48
3.2 The CPU fetch–execute cycle – high-speed tedium 52
3.3 System bus – synchronous or asynchronous? 56
3.4 System clock – instruction cycle timing 59
3.5 Pre-fetching – early efforts to speed things up 61
3.6 Memory length – address width 63
3.7 Endian-ness – Microsoft vs. Unix, or Intel vs. Motorola? 65
3.8 Simple input–output – parallel ports 67
Building computers from logic: the control unit 73
4.1 Electronic Lego and logic – the advantage of modular units 74
4.2 Basic logic gates – truth tables for AND, OR, XOR and NOT 75
4.3 Truth tables and multiplexers – a simple but effective design tool 77
4.4 Programmable logic – reconfigurable logic chips 79
4.5 Traffic light controllers – impossible to avoid! 82
4.6 Circuit implementation from truth tables – some practical tips 83
4.7 Decoder logic – essential for control units and memories 85
4.8 CPU control unit – the ‘brain’ 87
4.9 Washing machine controllers – a simple CU 88
4.10 RISC vs. CISC decoding – in search of faster computers 91
Building computers from logic: the ALU 97
5.1 De Morgan’s equivalences – logical interchangeability 98
5.2 Binary addition – half adders, full adders, parallel adders 98
5.3 Binary subtraction – using two’s complement integer format 101
5.4 Binary shifting – barrel shifter 103
5.5 Integer multiplication – shifting and adding 105
5.6 Floating-point numbers – from very, very large to very, very small 108
Building computers from logic: the memory 117
6.1 Data storage – one bit at a time 118
6.2 Memory devices – memory modules for computers 120
6.3 Static memory – a lot of fast flip-flops 121
6.4 Dynamic memory – a touch of analogue amid the digital 122
6.5 DRAM refreshing – something else to do 124
6.6 Page access memories – EDO and SDRAM 124
6.7 Memory mapping – addressing and decoding 127
6.8 IO port mapping – integration vs. differentiation 131
3
4
5
6
vi Contents
WillaFMv3.qxd 11/28/07 9:18 AM Page vi
Contents vii
The Intel Pentium CPU 137
7.1 The Pentium – a high-performance microprocessor 138
7.2 CPU registers – temporary store for data and address variables 143
7.3 Instruction set – introduction to the basic Pentium set 148
7.4 Structure of instructions – how the CU sees it 149
7.5 CPU status flags – very short-term memory 151
7.6 Addressing modes – building effective addresses 153
7.7 Execution pipelines – the RISC speedup technique 155
7.8 Pentium 4 – extensions 157
7.9 Microsoft Developer Studio – using the debugger 158
Subroutines 167
8.1 The purpose of subroutines – saving space and effort 168
8.2 Return address – introducing the stack 169
8.3 Using subroutines – HLL programming 170
8.4 The stack – essential to most operations 172
8.5 Passing parameters – localizing a subroutine 173
8.6 Stack frame – all the local variables 176
8.7 Supporting HLLs – special CPU facilities for dealing with subroutines 179
8.8 Interrupt service routines – hardware-invoked subroutines 179
8.9 Accessing operating system routines – late binding 180
Simple input and output 185
9.1 Basic IO methods – polling, interrupt and DMA 186
9.2 Peripheral interface registers – the programmer’s viewpoint 187
9.3 Polling – single-character IO 191
9.4 Interrupt processing – service on demand 197
9.5 Critical data protection – how to communicate with interrupts 205
9.6 Buffered IO – interrupt device drivers 209
9.7 Direct memory access (DMA) – autonomous hardware 210
9.8 Single-character IO – screen and keyboard routines 212
Serial Connections 219
10.1 Serial transmission – data, signals and timing 220
10.2 Data format – encoding techniques 221
10.3 Timing synchronization – frequency and phase 224
10.4 Data codes and error control – parity, checksums, Hamming codes
and CRCs 227
10.5 Flow control – hardware and software methods 235
7
8
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