ARM DIT 0017B Copyright © 2011 ARM. All rights reserved. iii
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Contents
Cortex-A7 MPCore Integration Manual
Preface
About this book ........................................................................................................... vi
Feedback .................................................................................................................... ix
Chapter 1 Introduction
1.1 About integrating the delivery .................................................................................. 1-2
1.2 Key integration tasks ............................................................................................... 1-5
1.3 Design tools ............................................................................................................. 1-6
Chapter 2 Functional Integration Guidelines
2.1 About functional integration ..................................................................................... 2-2
2.2 Clocks and resets .................................................................................................... 2-3
2.3 Interfaces ................................................................................................................. 2-8
2.4 Configuration ........................................................................................................ 2-19
2.5 Debug over power-down ........................................................................................ 2-24
2.6 MBIST ................................................................................................................... 2-26
Chapter 3 Integration Kit
3.1 About the Integration Kit .......................................................................................... 3-2
3.2 Cortex-A7 IK directory structure .............................................................................. 3-3
3.3 Testbench structure ................................................................................................. 3-5
3.4 Test overview ........................................................................................................... 3-9
3.5 Design flow ............................................................................................................ 3-17
3.6 Setting up and running the Cortex-A7 IK ............................................................... 3-19
3.7 Configuring the Cortex-A7 IK ................................................................................. 3-20
3.8 Validating the design with ikvalidate ...................................................................... 3-24
3.9 Debugging failures ................................................................................................. 3-29
3.10 Modifying and reusing the RTL .............................................................................. 3-31
3.11 Modifying and reusing tests ................................................................................... 3-33
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