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SiI9136-3

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Data Sheet

SiI9136-3 HDMI Deep Color Transmitter

Data Sheet

Document # SiI-DS-1084-A

SiI9136-3 HDMI Deep Color Transmitter

Data Sheet

Silicon Image, Inc.

CONFIDENTIAL

October 2010

information (including trade secrets, copyright, and other interests) of Silicon Image, Inc. You may not use these

materials except only for your bona fide non-commercial evaluation of your potential purchase of products and/or

services from Silicon Image or its affiliates, and/or only in connection with your purchase of products and/or services

from Silicon Image or its affiliates, and only in accordance with the terms and conditions herein. You have no right to

copy, modify, transfer, sublicense, publicly display, create derivative works of or distribute these materials, or otherwise

make these materials available, in whole or in part, to any third party.

Patents

The subject matter described herein contains one or more inventions claimed in patents and/or patents pending owned by

Silicon Image, Inc., including but not limited to the inventions claimed in US patents #6,914,637, #6,151,334,

#6,026,124, #5,974,464 and #5,825,824.

Trademark Acknowledgment

Silicon Image™, VastLane™, SteelVine™, PinnaClear™, Simplay™, Simplay HD™, Satalink™, InstaPort™,

TMDS™, and LiquidHD™ are trademarks or registered trademarks of Silicon Image, Inc. in the United States and other

countries. HDMI

, the HDMI logo and High-Definition Multimedia Interface™ are trademarks or registered trademarks

of, and are used under license from, HDMI Licensing, LLC. x.v.Color™ is a trademark of Sony Corporation.

Export Controlled Document

This document contains information subject to the Export Administration Regulations (EAR) and has a classification of

EAR99 or is controlled for Anti-Terrorism (AT) purposes. Transfer of this information by any means to an EAR Country

Group E:1 or foreign national thereof (whether in the U.S. or abroad) may require an export license or other approval from

the U.S. Department of Commerce. For more information, contact the Silicon Image Director of Global Trade Compliance.

Further Information

To request other materials, documentation, and information, contact your local Silicon Image, Inc. sales office or visit

the Silicon Image, Inc. web site at www.siliconimage.com.

Revision History

Revision

Date

Comment

10/2010

First Production release.

SiI9136-3 HDMI Deep Color Transmitter

Data Sheet

Silicon Image, Inc.

CONFIDENTIAL

Table of Contents

Introduction .......................................................................................................................................................................... 1

Video Input ....................................................................................................................................................................... 1

Audio Input ....................................................................................................................................................................... 1

HDMI Output ................................................................................................................................................................... 1

Control Capability ............................................................................................................................................................ 1

Packaging ......................................................................................................................................................................... 1

Comparison of SiI9136-3 Transmitter with SiI9134 Transmitter ..................................................................................... 2

Pin Diagram ...................................................................................................................................................................... 3

Description ........................................................................................................................................................................... 4

Video Data Input and Conversion .................................................................................................................................... 4

Input Clock Multiplier/Divider ..................................................................................................................................... 4

Video Data Capture ...................................................................................................................................................... 5

Embedded Sync Decoder .............................................................................................................................................. 5

Data Enable Generator .................................................................................................................................................. 5

Combiner ...................................................................................................................................................................... 5

4:2:2 to 4:4:4 Upsampler .............................................................................................................................................. 5

RGB Range Expansion ................................................................................................................................................. 5

Color Space Converter .................................................................................................................................................. 5

RGB/YCbCr Range Compression ................................................................................................................................ 6

4:4:4 to 4:2:2 Downsampler ......................................................................................................................................... 6

Clipping ........................................................................................................................................................................ 6

18-to-8/10/12/16-Dither ................................................................................................................................................ 6

Audio Data Capture .......................................................................................................................................................... 6

Framer............................................................................................................................................................................... 6

HDCP Encryption Engine/XOR Mask ............................................................................................................................. 6

HDCP Key ROM .............................................................................................................................................................. 6

TMDS Transmitter ........................................................................................................................................................... 7

GPIO ................................................................................................................................................................................. 7

Hot Plug Detector ............................................................................................................................................................. 7

CEC Interface ................................................................................................................................................................... 7

DDC Master I

C Interface ................................................................................................................................................ 7

Receiver Sense and Interrupt Logic .................................................................................................................................. 7

Configuration Logic and Registers ................................................................................................................................... 7

C Slave Interface ............................................................................................................................................................ 8

Electrical Specifications ....................................................................................................................................................... 9

Absolute Maximum Conditions ........................................................................................................................................ 9

Normal Operating Conditions ........................................................................................................................................... 9

I/O Specifications ....................................................................................................................................................... 10

DC Power Supply Specifications ................................................................................................................................ 11

AC Specifications ........................................................................................................................................................... 12

Video/HDMI Timing Specifications .......................................................................................................................... 12

Audio AC Timing Specifications ............................................................................................................................... 12

Video AC Timing Specifications ................................................................................................................................ 13

Control Signal Timing Specifications ......................................................................................................................... 14

CEC Timing Specifications ........................................................................................................................................ 14

Timing Diagrams ............................................................................................................................................................ 15

Input Timing Diagrams ............................................................................................................................................... 15

Reset Timing Diagrams .............................................................................................................................................. 16

TMDS Timing Diagram ............................................................................................................................................. 16

Audio Timing Diagrams ............................................................................................................................................. 17

C timing Diagrams ................................................................................................................................................... 17

Pin Descriptions .................................................................................................................................................................. 18

Video Data Input ............................................................................................................................................................ 18

TMDS Output ................................................................................................................................................................. 19

Audio Input ..................................................................................................................................................................... 19

SiI9136-3 HDMI Deep Color Transmitter

Data Sheet

Silicon Image, Inc.

CONFIDENTIAL

DDC, CEC, Configuration, and Control ......................................................................................................................... 20

Power and Ground .......................................................................................................................................................... 20

Not Connected and Reserved .......................................................................................................................................... 20

Feature Information ............................................................................................................................................................ 21

RGB to YCbCr Color Space Converter .......................................................................................................................... 21

YCbCr to RGB Color Space Converter .......................................................................................................................... 21

C Register Information ................................................................................................................................................. 21

S Audio Input ............................................................................................................................................................... 22

Direct Stream Digital Input ............................................................................................................................................. 22

S/PDIF Input ................................................................................................................................................................... 22

S and S/PDIF Supported MCLK Frequencies .............................................................................................................. 22

Audio Downsampler Limitations .................................................................................................................................... 23

High-Bitrate Audio on HDMI ......................................................................................................................................... 23

Power Domains ............................................................................................................................................................... 24

Internal DDC Master ...................................................................................................................................................... 24

Deep Color Support ........................................................................................................................................................ 25

Source Termination ........................................................................................................................................................ 25

3D and 4K Video Formats .............................................................................................................................................. 25

Control Signal Connections ............................................................................................................................................ 26

Input Data Bus Mapping ................................................................................................................................................. 27

Common Video Input Formats ................................................................................................................................... 27

RGB and YCbCr 4:4:4 Separate Sync ........................................................................................................................ 28

YC 4:2:2 Separate Sync Formats ................................................................................................................................ 30

YC 4:2:2 Embedded Syncs Formats ........................................................................................................................... 32

YC Mux 4:2:2 Separate Sync Formats ....................................................................................................................... 34

YC Mux 4:2:2 Embedded Sync Formats .................................................................................................................... 36

RGB and YCbCr 4:4:4 Dual Edge Mode Formats ...................................................................................................... 38

Design Recommendations .................................................................................................................................................. 41

Power Supply Decoupling .............................................................................................................................................. 41

Power Supply Sequencing .............................................................................................................................................. 41

ESD Recommendations .................................................................................................................................................. 41

High-Speed TMDS Signals ............................................................................................................................................ 42

Layout Guidelines ....................................................................................................................................................... 42

TMDS Output Recommendation ................................................................................................................................ 42

EMI Considerations .................................................................................................................................................... 42

Package Information ........................................................................................................................................................... 43

ePad Requirements ......................................................................................................................................................... 43

PCB Layout Guidelines .................................................................................................................................................. 43

Package Dimensions ....................................................................................................................................................... 44

Marking Specification..................................................................................................................................................... 45

Ordering Information ...................................................................................................................................................... 45

References .......................................................................................................................................................................... 46

Standards Documents ..................................................................................................................................................... 46

Silicon Image Documents ............................................................................................................................................... 46

SiI9136-3 HDMI Deep Color Transmitter

Data Sheet

Silicon Image, Inc.

CONFIDENTIAL

List of Figures

Figure 1. Example of System Architecture ........................................................................................................................... 1

Figure 2. Pin Diagram (Top View) ....................................................................................................................................... 3

Figure 3. Functional Block Diagram .................................................................................................................................... 4

Figure 4. Transmitter Video Data Processing Path ............................................................................................................... 4

Figure 5. Test Point VCCTP for VCC Noise Tolerance Spec .............................................................................................. 9

Figure 6. IDCK Clock Duty Cycle ..................................................................................................................................... 15

Figure 7. Control and Data Single-Edge Setup and Hold Times—EDGE = 1 ................................................................... 15

Figure 8. Control and Data Single-Edge Setup and Hold Times—EDGE = 0 ................................................................... 15

Figure 9. Control and Data Dual-Edge Setup and Hold Times........................................................................................... 15

Figure 10. VSYNC and HSYNC Delay Times Based On DE ............................................................................................ 16

Figure 11. DE HIGH and LOW Times ............................................................................................................................... 16

Figure 12. Conditions for Use of RESET# ......................................................................................................................... 16

Figure 13. RESET# Minimum Timings ............................................................................................................................. 16

Figure 14. Differential Transition Times ............................................................................................................................ 16

Figure 15. I

S Input Timings .............................................................................................................................................. 17

Figure 16. S/PDIF Input Timings ....................................................................................................................................... 17

Figure 17. MCLK Timings ................................................................................................................................................. 17

Figure 18. DSD Input Timings ........................................................................................................................................... 17

Figure 19. I

C Data Valid Delay (Driving Read Cycle Data) ............................................................................................. 17

Figure 20. High Speed Data Transmission ......................................................................................................................... 23

Figure 21. High Bitrate Stream Before and after Reassembly and Splitting ...................................................................... 24

Figure 22. High Birate Stream After Splitting .................................................................................................................... 24

Figure 23. Simplified Host I

C Interface Using Master DDC Port ..................................................................................... 24

Figure 24. Master I

C Supported Transactions ................................................................................................................... 25

Figure 25. Controller Connections Schematic .................................................................................................................... 26

Figure 26. 8-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ..................................................................................... 29

Figure 27. 10-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ................................................................................... 29

Figure 28. 12-Bit Color Depth RGB/YCbCr/xvYCC 4:4:4 Timing ................................................................................... 29

Figure 29. 8-Bit Color Depth YC 4:2:2 Timing ................................................................................................................. 31

Figure 30. 10-Bit Color Depth YC 4:2:2 Timing ............................................................................................................... 31

Figure 31. 12-Bit Color Depth YC 4:2:2 Timing ............................................................................................................... 31

Figure 32. 8-Bit Color Depth YC 4:2:2 Embedded Sync Timing ....................................................................................... 32

Figure 33. 10-Bit Color Depth YC 4:2:2 Embedded Sync Timing ..................................................................................... 33

Figure 34. 12-Bit Color Depth YC 4:2:2 Embedded Sync Timing ..................................................................................... 33

Figure 35. 8-Bit Color Depth YC Mux 4:2:2 Timing ......................................................................................................... 34

Figure 36. 10-Bit Color Depth YC Mux 4:2:2 Timing ....................................................................................................... 35

Figure 37. 12-Bit Color Depth YC Mux 4:2:2 Timing ....................................................................................................... 35

Figure 38. 8-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing .............................................................................. 36

Figure 39. 10-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing ............................................................................ 37

Figure 40. 12-Bit Color Depth YC Mux 4:2:2 Embedded Sync Timing ............................................................................ 37

Figure 41. 8-Bit Color Depth 4:4:4 Dual Edge Timing ...................................................................................................... 39

Figure 42. 10-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 39

Figure 43. 12-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 39

Figure 44. 16-Bit Color Depth 4:4:4 Dual Edge Timing .................................................................................................... 40

Figure 45. Decoupling and Bypass Schematic ................................................................................................................... 41

Figure 46. Decoupling and Bypass Capacitor Placement ................................................................................................... 41

Figure 47. 100-Pin Package Diagram ................................................................................................................................. 44

Figure 48. Marking Diagram .............................................................................................................................................. 45