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Remote Update IP
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更新于2023-03-16
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远程更新Intel®FPGA IP核心使用支持设备中可用的专用远程系统升级电路实现设备重新配置。远程系统升级可以帮助您在不召回产品的情况下交付特性增强和bug修复,减少上市时间,并延长产品寿命。远程更新英特尔FPGA IP核心命令配置电路开始重新配置周期。
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Contents
1. Remote Update Intel
®
FPGA IP User Guide..................................................................... 3
1.1. Avalon
®
-MM in Remote Update Intel FPGA IP Core..................................................... 4
1.2. Intel Arria 10 Devices.............................................................................................5
1.2.1. Remote System Configuration Mode............................................................. 5
1.2.2. Remote System Configuration Components................................................... 7
1.2.3. Parameter Settings.................................................................................... 7
1.2.4. Ports........................................................................................................8
1.2.5. Parameters............................................................................................. 10
1.2.6. Avalon-MM Interface................................................................................ 10
1.2.7. Enabling Remote System Upgrade Circuitry................................................. 13
1.3. Arria II, Arria V, Cyclone V, Stratix IV, and Stratix V Devices...................................... 14
1.3.1. Remote System Configuration Mode........................................................... 14
1.3.2. Remote System Configuration Components................................................. 14
1.3.3. Parameter Settings.................................................................................. 15
1.3.4. Ports...................................................................................................... 16
1.3.5. Parameters............................................................................................. 19
1.3.6. Avalon-MM Interface ............................................................................... 20
1.3.7. Enabling Remote System Upgrade Circuitry................................................. 22
1.4. Cyclone IV Devices...............................................................................................23
1.4.1. Remote System Configuration Mode........................................................... 23
1.4.2. Remote System Configuration Components................................................. 23
1.4.3. Parameter Settings.................................................................................. 25
1.4.4. Ports...................................................................................................... 25
1.4.5. Parameters............................................................................................. 28
1.4.6. Remote Update Operation......................................................................... 29
1.4.7. Avalon-MM Interface ............................................................................... 31
1.4.8. Enabling Remote System Upgrade Circuitry................................................. 34
1.5. Flash Memory Programming Files........................................................................... 34
1.6. Design Examples................................................................................................. 35
1.6.1. Intel Arria 10 Remote Update Design Example............................................. 35
1.6.2. Cyclone V Remote Update Design Example.................................................. 36
1.7. Remote Update Intel FPGA IP User Guide Archives................................................... 38
1.8. Document Revision History for the Remote Update Intel FPGA IP User Guide................38
Contents
Remote Update Intel FPGA IP User Guide
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2
1. Remote Update Intel
®
FPGA IP User Guide
The Remote Update Intel
®
FPGA IP core implements a device reconfiguration using
dedicated remote system upgrade circuitry available in supported devices. Remote
system upgrade helps you deliver feature enhancements and bug fixes without
recalling your product, reduces time-to-market, and extends product life. The Remote
Update Intel FPGA IP core commands the configuration circuitry to start a
reconfiguration cycle.
The dedicated circuitry performs error detection during and after the configuration
process. When the dedicated circuitry detects errors, the circuitry facilitates system
recovery by reverting back to a safe, default factory configuration image and then
provides error status information.
The following figures shows a functional diagram for a typical remote system upgrade
process.
Figure 1. Typical Remote System Upgrade Process
New Application Image
Development Location
Remote System
Upgrade (RSU)
Control
Module
Flash
Controller
RSU
IP Core
Control Module
receive data from network
and update the new image into
the flash
Control Module
trigger reconfiguration
to new image using RSU IP core
Flash
Reconfiguration to new application image
Configuration Data
sent through network
Note: Intel recommends that you use the following Remote Update Intel FPGA IP core input
clock (f
MAX
) values:
• 10 MHz— for Arria
®
II and Stratix
®
IV devices
• 20 MHz—for other supported devices
UG-31005 | 2018.11.26
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Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus
and Stratix words and logos are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other
countries. Intel warrants performance of its FPGA and semiconductor products to current specifications in
accordance with Intel's standard warranty, but reserves the right to make changes to any products and services
at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Intel. Intel
customers are advised to obtain the latest version of device specifications before relying on any published
information and before placing orders for products or services.
*Other names and brands may be claimed as the property of others.
ISO
9001:2015
Registered
Figure 2. High-Level Block Diagram of Remote System Upgrade
FPGA
Nios II Processor
or User Logic
Passive Serial and
Fast Passive Parallel
Configuration Scheme
Flash
Memory
MAX II,
MAX V or
MAX 10
FPGA
Nios II Processor
or User Logic
EPCS,
EPCQ or
EPCQ-L
FPGA
Nios II Processor
or User Logic
Supported
Parallel
Flash
Active Serial
Configuration Scheme
Active Parallel
Configuration Scheme
(Cyclone IV devices only)
Note: The remote system upgrade feature support for each configuration scheme varies
between device family. For more information about the configuration scheme and the
remote system upgrade feature, please refer to the configuration chapter of the
respective device family handbook.
Related Information
• Remote Update Intel FPGA IP Core Knowledge Base
• Configuration Support Center
• Introduction to Intel FPGA IP Cores
Provides general information about all Intel FPGA IP cores, including
parameterizing, generating, upgrading, and simulating IP cores.
• Creating Version-Independent IP and Qsys Simulation Scripts
Create simulation scripts that do not require manual updates for software or IP
version upgrades.
• Project Management Best Practices
Guidelines for efficient management and portability of your project and IP files.
• Remote Update Intel FPGA IP User Guide Archives on page 38
Provides a list of user guides for previous versions of the Remote Update Intel
FPGA IP core.
1.1. Avalon
®
-MM in Remote Update Intel FPGA IP Core
The Avalon
®
-MM interface is supported in the Remote Update Intel FPGA IP core. You
can only use the IP core either with or without Avalon-MM interface. You can
instantiate the Avalon-MM Interface by turning on the Add support for Avalon
Interface option in Remote Update Intel FPGA IP parameter editor.
Note:
The Avalon-MM support for Remote Update Intel FPGA IP core is available in Intel
Quartus
®
Prime software version 15.0 and onwards.
1. Remote Update Intel
®
FPGA IP User Guide
UG-31005 | 2018.11.26
Remote Update Intel FPGA IP User Guide
Send Feedback
4
Figure 3. Remote Update Intel FPGA IP Core Implementation with and without Avalon-
MM Interface
Figure shows the Avalon Remote update support architecture which consists of 2 components; Remote Intel
FPGA IP core and Avalon remote update controller. If Avalon interface is enabled, the conduit interfaces of
Remote Update Intel FPGA IP core will connect to conduit interface of the controller.
Avalon Remote
Update Controller
Avalon Remote
Update Controller
Remote Update
Intel FPGA IP Core
Remote Update Intel FPGA IP core without Avalon-MM Interface
Remote Update Intel FPGA IP core with Avalon-MM Interface
Remote Update
Intel FPGA IP Core
1.2. Intel Arria 10 Devices
1.2.1. Remote System Configuration Mode
Remote configuration supports “Direct to application” (DTA) and “Application to
Application” update. Remote configuration only supports a 4-byte address scheme so
there is no support for devices with densities smaller than 128 Mbit.
1. Remote Update Intel
®
FPGA IP User Guide
UG-31005 | 2018.11.26
Send Feedback
Remote Update Intel FPGA IP User Guide
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