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23
semiconductor
TM
Project:
D
45 86
Date Changed:
Title:
by
B B
Gary Milliorn
Engineer:
Steve Foster
Revision:
Tiffany Tran-Chandler
7700 W. Parmer Ln
Cass Arnett
Austin, Texas 78729
freescale
C
Freescale Semiconductor
C
semiconductor
TM
freescale
87654321
1
Gary Milliorn
1.03
01
HPCN: Argo Navis
Cover Story
Thursday, February 1, 2007
2:05:21 pm
Page:
7
A
D
Time Changed:
HPCN: High-Performance Computing platform for Networking
A
42
PCIExpress Slot #1
QuadPHY Ports
34
loved can be lost. All rights reserved. No warranty is made,
04
VCORE Power Supply
38
39
40
DDR2 DIMM #1
25
DDR2 DIMM #2
V1.02 2006Nov07 PCB Tweaks
Contents
35
DDR1 DIMM #1
22
10
SERDES and 1.8V Power
Global Bypass, Mounting, etc.
USB Ports
07
All information is subject to change without notice.
5.
M1573 PCI, RTC, LPC and Misc
Power Entry, Switches
Contents
20
05
Placement and PCB Stackup
DDR1 Termination
Debug, LEDs
52
57
06 Hot Power Supplies
LPC Flash
54PIXIS System Logic, Part 114
PIXIS System Logic, Part 215
this product.
13
Revision:
CompactFlash Header
44
Flash and PromJet Headers
MC8641D SERDES #1
Ethernet Port Connectors #1/#2
32
41
MC8641D SERDES #2
MC8641D LocalBus Interface
The sheet-to-sheet cross reference format is:
27
MC8641D Control Block
37
Components with the label "No_Stuff" are not to be installed by
default; they are for test or manufacturing purposes only.
C123
DDR1 DIMM #2
DDR2 Termination and Power
50 AC97 Codec
PEX Alternate Slot #1 and MidBus Probe45
M1573 ULI PEX Connection46
23
PCI Isolation Buffer16
VCC_3.3
LocalBus Debug
Page
4.
3
08
MC8641D Power part 1
MC8641D Power part 2
1.2V power
and ground unless explicitly shown otherwise. Global power
C
11
System and PHY Clocks
This schematic is provided for reference purposes only.
1
No warranty, expressed or applied, is made as to the
accuracy of the information contained herein. Contact
Freescale Sale/FAEs to obtain the latest information on
456
51
55
17
COP and Debug Interfaces
SIO
53 AC97 Audio Connectors
I2CBus Devices
21
MC8641D DDR Interface #2
24
D
12
SERDES (REFCLK) and BCLK Clocks
Engineer:
semiconductor
MC8641D Quad Ethernet MAC
28
43
30
VCORE
B
7
29
connections are:
DATE
Sheet VertZoneLetter HorizZoneNumber
of IBM. Other trademarks are the respective property of their
respective copyright holders. Anyone perfect must be lying,
Initial version
Unless otherwise specified:
All resistors are SMD0402, in ohms, 0.08W, +/-5%
47
PCI Slots #1 and #2
Part numbers used are for reference only; compatible
parts may be used; refer to the bill of materials.
49 M1573 SATA + IDE
48
Page
Schematic Notes
1.
2.
7
VCC_5
3.
4
VCC_1.2
anything easy has it’s cost, anyone plain can be lovely, anyone
33pF
09
Integrated circuits have default connections to power
6.
7.
VCC_2.5
Freescale and the Freescale logo are registered
2
TM
123
02
Block Diagram
01
18
Configuration Switches
apply (i.e. PCI). Little-endian numbering is noted at the
source component.
19
M1573 USB + APIC
56
MC8641D DDR Interface #1
8
A
B
D
Date Changed:
Time Changed:
Freescale Semiconductor
Serial Ports 1 and 2
26
36
QuadPHY MAC
GND
VCORE Power Supply, cont’d
null
null1
All buses follow big-endian bit numbering order (bit 0 is
C
freescale
QuadPHY Power
31
CHANGES
V1.0 2005Aug03
Title:
Project:
Austin, Texas 78729
33
Cover Page
Board impedance is 55 +/- 5 ohms.
General Information
All capacitors are SMD0402, in microfarads (uF), +/-20%.
Page:
A
express or implied.
8
Platform Power
65
No_Stuff
7700 W. Parmer Ln
Ethernet Port Connectors #3/#4
V1.0a 2006Feb27 Initial production
Gary Milliorn
1.03
02
HPCN: Argo Navis
Information, please
Thursday, February 1, 2007
2:05:47 pm
the most-significant bit), except where industry standards
trademarks of Freescale Semiconductor. PowerPC is a trademark
All ferrites are Z=50 ohms at 100 MHz.
All fuses are self-resetting polyswitch (PTC) devices.
REV
03
All inductances are in microhenries (uH).
Bus
7700 W. Parmer Ln
Austin, Texas 78729
C
A
USB
AUDIO
PromJET
DDR #1
8
78
Serial
RJ45MAG
RJ45MAG
RJ45MAG
Engineer:
Revision:
6
Local
VCORE
SATA
231 56
PEX Slot
PEX Slot
PCI 1
PCI 2
TM
MC8641D
Title:
7
Group
LPC
PEx
PEx
Flash
SIO
PATA
C
54321
M1575
CF+
DDR #2
A
B
Date Changed:
Time Changed:
PIXIS
Clock
Page:
Project:
D
VSC8244
QuadPHY
RJ45MAG
Gary Milliorn 03
1.03
HPCN: Argo Navis
Block Diagram
Thursday, February 1, 2007
2:05:55 pm
4
B
D
Flash
freescale
Freescale Semiconductor
semiconductor
Time Changed:
Engineer:
Revision:
Page:
LAYER 3
Batt.
COP
SuperIO
LPCFlash
AC97
VCORE
VDD_PLAT
MPC9855
CONFIG SWITCHES
0.5oz
0.5oz
LAYER 1
SIGNAL: 7
1.0oz
21
8
VTT PLANE + POWER #2
USB
RST
PWR
FAN
RST
Title:
SIGNAL: 2
PWR
LED
LED
STATUS LEDS
PLANE: GND 1
SVC
QPHY
PS/2
29LV641
Note: Not Definitive -- see
PCIExpress 4X
SATA3
SATA4
432
0.5oz
0.5oz
SIGNAL
SIGNAL
PLANE
Project:
ON
A12V
ATX POWER
APA150
8
A
B
D
Date Changed:
PLANE
LAYER 2
LAYER 4
LAYER 5
LED
LED
LED
LED
PromJet
IDE
SATA1
APA PROG
SIGNAL
1.5oz
A
B
freescale
Design Workbook.
PLANE: VCC_5, VCC_HOT_xxx
PLANE: GND
DDR #1 DIMM #1
DDR #1 DIMM #2
7
RJ45
SIGNAL: 5
PLANE: VCC_3.3, VCORE
SIGNAL: 3
SIGNAL: 4
PLANE: GND
244mm (9.6")
SIGNAL: 6
244mm (9.6")
D
1
RJ45
SER #1
DDR #2 DIMM #2
567
RJ45
65
SATA2
Mounting holes, positioned per microATX spec.
M1575
LT1331
PCI 2
DDR #2 DIMM #1
LED
LED
Mounting holes for socket.
MC8641D
AUDIO
1.0oz
BURIED CAP LAYER OPTION
USB
USBHDR
MIC2077
LED
LED
SIGNAL
SIGNAL
PLANE
LAYER 6
LAYER 7
PCIExpress 8X (in 16X slot)
PCI 3
LAYER 8
semiconductor
TM
4
SIGNAL
1.5oz
SIGNAL: 1
1.0oz
PLANE
1.0oz
SIGNAL
C
LED
LED
LED
LED
INFO LEDS
158.75mm (6.25")
VTT PLANE + POWER
RJ45
LAYER 9
LAYER 12
3
7700 W. Parmer Ln
Austin, Texas 78729
C
LED
LED
Gary Milliorn 04
1.03
HPCN: Argo Navis
Placement Guide and PCB Stackup
Thursday, February 1, 2007
2:06:05 pm
LAYER 10
LAYER 11
.093
0.5oz
1.0oz
Freescale Semiconductor
PLANE
ATX POWER
CHASSIS POWER LED
ATX CHASSIS POWER
VCC and VCC_3.3 on separate power planes.
LOCAL POWER
OPTION
22ms R-C delay, or FPGA
control (not both).
22ms
CHASSIS RESET SWITCH
FORCE PSU ALWAYS ON
LOCAL RESET SWITCH
(3V)
LOCAL EVENT SWITCH
semiconductor
TM
321
8
Freescale Semiconductor
65
A
4321
45
Gary Milliorn 05
1.03
HPCN: Argo Navis
Power Entry, System Reset
Thursday, February 1, 2007
2:06:19 pm
67 8
B
D
Date Changed:
7
Engineer:
CUBE FANSINK HEADER
Revision:
Page:Title:
Project:
7700 W. Parmer Ln
Austin, Texas 78729
C
A
B
D
C
freescale
CHASSIS POWER
PC FANSINK HEADER
Time Changed:
100
header.1x2
J5
1
2
0.1uF
C39
14E2
U2
74lvc1g125.sc70
VCC_3.3=VCC_HOT_3.3
2
1
4
R45
VCC_HOT_3.3
VCC_12N
C43
0.1uF
14D2
VCC_5
14C2
VCC_5
54D1
VCC_3.3
R52
10K
J4
header.1x2
1
2
VCC_3.3
25V
C38
330uF
+
R46
4.7K
VCC_12
330uF
C36
25V
+
VCC_3.3
220
R54
10uF
+
VCC_HOT_3.3
4.7K
R53
VCC_3.3=VCC_HOT_3.3
74lvc1g125.sc70
U1
2
1
4
C41
R57
sw.1spdt
SW7
1
2
3
54D1
0.1uF
sw.1spdt
SW9
1
2
3
47K
VCC_12_BULK
R58
10
C40
SW10
sw.1spdt
1
2
3
VCC_5
R43
4.7K
VCC_12 VCC_HOT_5
48C7
0.1uF
C37
R49
3.3K
J2
atxpwr_12v_2x2vert
GND1
1
2
GND2 P12V3
3
P12V4
4
VCC_3.3
R48
6.8K
R50
100
header.1x3
1
2
3
14C8
14D2
3.3K
R47
25V
330uF
C34
+
14B2
J8
R55
10
14C2
VCC_5
10uF
C42
+
100
R51
conn.fan.3pos
P2
BK
1
RD
2
BL
3
+
14C8
VCC_HOT_3.3
C32
330uF
25V
+
VCC_12
C35
330uF
25V
+
330uF
C33
25V
17
GND_P17
GND_P3
3
GND_P5
5
GND_P7
7
PS_ON
14
PWRGOOD
8
VCC_P19
19
VCC_P20
20
VCC_P4
4
VCC_P6
6
VSTDBY
9
+12V_P10
10
+3.3V_P1
1
+3.3V_P11
11
+3.3V_P2
2
-12V_P12
12
-5V_P18
18
GND_P13
13
GND_P15
15
GND_P16
16
No_Stuff
header.1x2
J7
1
2
atxpwr_2x10vert_nopeg
J6
J3
header.1x2
1
2
VCC_HOT_3.3
R1 220
R56
10
R44
220K
FAN_TACH
FAN_PWM
NC
NC
NC
NC
NC
SB_RSMRST
14C8
EVENT*
SHORT_POWERFANPWR
PWRSW*
PWRSWS*
PS_ON*
RSMRST*
SB_RSMRST*
PWRGD
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