PCI Express M.2 Specification
PCI Express M.2 Specification
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Revision 0.7, November 27, 2012
3.1.4.
PCI Express Auxiliary Signals ................................................................................................. 91
3.1.4.1.
Reference Clock ................................................................................................................ 91
3.1.4.2.
CLKREQ# Signal .............................................................................................................. 92
3.1.4.2.1.
Power-up Requirements ................................................................................ 93
3.1.4.2.2.
Dynamic Clock Control .................................................................................. 94
3.1.4.3.
Clock Request Support Reporting and Enabling .............................................................. 95
3.1.4.4.
PERST# Signal ................................................................................................................. 95
3.1.4.5.
WAKE# Signal ................................................................................................................... 95
3.1.5.
USB Interface .......................................................................................................................... 96
3.1.6.
Display Port Interface .............................................................................................................. 96
3.1.6.1.
HPD ................................................................................................................................... 96
3.1.6.2.
MLDIR ............................................................................................................................... 96
3.1.7.
SDIO Interface ......................................................................................................................... 97
3.1.8.
UART Interface ........................................................................................................................ 99
3.1.8.1.
UART Wakeup .................................................................................................................. 99
3.1.9.
PCM/I2S Interface ................................................................................................................. 102
3.1.10.
I2C Interface .......................................................................................................................... 103
3.1.10.1.
ALERT# Signal ................................................................................................................ 103
3.1.10.2.
I2C Data Signal ............................................................................................................... 103
3.1.10.3.
I2C Clock Signal .............................................................................................................. 103
3.1.11.
NFC Supplemental UIM Interface ......................................................................................... 103
3.1.11.1.
UIM Power In .................................................................................................................. 103
3.1.11.2.
UIM Power Out ................................................................................................................ 104
3.1.11.3.
UIM SWP ........................................................................................................................ 104
3.1.12.
Communication Specific Signals ........................................................................................... 104
3.1.12.1.
Suspend Clock ................................................................................................................ 104
3.1.12.2.
Status Indicators ............................................................................................................. 104
3.1.12.3.
W_DISABLE# Signal....................................................................................................... 106
3.1.12.4.
Coexistence Signals........................................................................................................ 107
3.1.13.
Reserved Pins ....................................................................................................................... 107
3.1.14.
Socket 1 Connector Pin-out Definitions ................................................................................. 107
3.1.15.
Socket 1 Based Soldered-down Module Pinouts .................................................................. 111
3.2. WWAN/SSD/Other Socket 2 System Interface Signals ................................................ 114
3.2.1.
Power Sources and Grounds ................................................................................................ 117
3.2.2.
PCI Express Interface ............................................................................................................ 117
3.2.3.
USB Interface ........................................................................................................................ 117
3.2.4.
HSIC Interface ....................................................................................................................... 117
3.2.5.
SSIC Interface ....................................................................................................................... 117
3.2.6.
USB3.0 Interface ................................................................................................................... 118
3.2.7.
SATA Interface ...................................................................................................................... 118
3.2.8.
User Identity Module (UIM) Interface .................................................................................... 118
3.2.8.1.
UIM_PWR ....................................................................................................................... 118
3.2.8.2.
UIM_RESET .................................................................................................................... 118
3.2.8.3.
UIM_CLK ......................................................................................................................... 119
3.2.8.4.
UIM_DATA ...................................................................................................................... 119
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