1.8.20 Dimension Drawings of PQFP44 ............................................................... 52
1.8.
21 Dimension Drawings of LQFP48 ............................................................... 53
1.8.22
Dimension Drawings of QFN48 ................................................................. 54
1.8.2
3 Dimension Drawings of LQFP64S ............................................................. 55
1.8.2
4 Dimension Drawings of LQFP64L............................................................. 56
1.8.2
5 Dimension Drawings of QFN64 ................................................................. 57
1.9 Special Peripheral Function(CCP/SPI,UART1/2/3/4) Switch ........... 58
1.9.1 Test Porgram that Switch CCP/PWM/PCA (C and ASM) .......................... 60
1.9.2 Test Porgram that Switch PWM2/3/4/5/PWMFLT (C and ASM) ............... 62
1.9.3
Test Porgram that Switch PWM6/PWM7 (C and ASM) .............................. 64
1.9.
4 Test Porgram that Switch SPI (C and ASM) ............................................... 66
1.9.
5 Test Porgram that Switch UART1 (C and ASM)
........................................
68
1.9.
6 Test Porgram that Switch UART2 (C and ASM) ........................................ 70
1.9.
7 Test Porgram that Switch UART3 (C and ASM) ........................................ 72
1.9.
8 Test Porgram that Switch UART4 (C and ASM) ........................................ 74
1.10 Global Unique Identification Number (ID) .................................... 76
Chapter 2 Clock, Reset and Power Management ...........................81
2.1 Clock ................................................................................................. 81
2.1.1 On-Chip Configurable Clock ...................................................................... 81
2.1.2 Divider for System Clock ............................................................................ 82
2.1.3 Programmable Clock Output (or as Frequency Divider) ............................ 83
2.1.3.1 Special Function Registers Related to Programmable Clock Output ..................83
2.1.3.2 Master Clock Output and Demo Program(C and ASM) ......................................88
2.1.3.3 Timer 0 Programmable Clock Output and Demo Program(C and ASM) ............91
2.1.3.4 Timer 1 Programmable Clock Output and Demo Program(C and ASM) ............95
2.1.3.5 Timer 2 Programmable Clock Output and Demo Program (C and ASM) ...........99
2.1.3.6 Timer 3 Programmable Clock Output and Demo Program (C and ASM) .........103
2.1.3.7 Timer 4 Programmable Clock Output and Demo Program (C and ASM) .........104
2.2 RESET Sources ............................................................................... 105
2.2.1 External RST pin Reset ............................................................................. 105
2.2.2 Software Reset and Demo Program (C and ASM) .................................... 106
2.2.3 Power-Off / Power-On Reset (POR) ......................................................... 109
2.2.4 MAX810 Speical Circuit Reset (Power-Off/ Power-On Reset Delay) ..... 109
2.2.5 Internal Low Voltage Detection Reset ....................................................... 110
2.2.6 Watch-Dog-Timer Reset ............................................................................ 113
2.2.7 Reset Caused by Program Accessing an Invalid Address ......................... 117
2.2.8 Warm Boot and Cold Boot Reset .............................................................. 118
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