PCI Express SFF-8639 Module
PCI Express SFF-8639 Module | 5
3. Hot Insertion and Removal ................................................................................... 36
3.2. Hot Removal Detection ..................................................................................................36
3.2.1. Hot Insertion Detection ............................................................................................................ 37
4. Electrical Requirements ........................................................................................ 38
4.1. Power Supply Requirements .........................................................................................38
4.2. Power Supply Sequencing .............................................................................................39
4.3. Power Supply Decoupling..............................................................................................40
4.4. Electrical Topologies and Link Definitions ......................................................................40
4.4.1. Topologies ............................................................................................................................... 40
4.4.2. Link Definition .......................................................................................................................... 42
4.5. Electrical Budgets ..........................................................................................................43
4.5.1. AC-Coupling Capacitors .......................................................................................................... 43
4.5.2. Insertion Loss Values (Voltage Transfer Function) ................................................................. 43
4.5.3. Jitter Values ............................................................................................................................. 44
4.5.4. Crosstalk .................................................................................................................................. 46
4.5.5. Lane-to-Lane Skew ................................................................................................................. 47
4.5.6. Transmitter Equalization .......................................................................................................... 47
4.5.7. Skew within the Differential Pair .............................................................................................. 47
4.5.8. Differential Data Trace Impedance .......................................................................................... 48
4.5.9. Differential Data Trace Propagation Delay .............................................................................. 48
4.6. Eye Diagrams at the SFF-8639 Interface .......................................................................48
4.6.1. SFF-8639 Module Transmitter Path Compliance Eye Diagram at 2.5 GT/s ........................... 49
4.6.2. SFF-8639 Module Transmitter Path Compliance Eye Diagrams at 5.0 GT/s ......................... 50
4.6.3. SFF-8639 Module Transmitter Path Compliance Eye Diagrams at 8.0 GT/s ......................... 52
4.6.4. SFF-8639 Module Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s ................. 53
4.6.5. SFF-8639 Module Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s ................. 54
4.6.6. SFF-8639 Module Minimum Receiver Path Sensitivity Requirements at 8.0 GT/s ................. 55
4.6.7. SFF-8639 System Transmitter Path Compliance Eye Diagram at 2.5 GT/s ........................... 58
4.6.8. SFF-8639 System Transmitter Path Compliance Eye Diagram at 5.0 GT/s ........................... 59
4.6.9. SFF-8639 System Transmitter Path Compliance Eye Diagram at 8.0 GT/s ........................... 62
4.6.10. SFF-8639 System Minimum Receiver Path Sensitivity Requirements at 2.5 GT/s ................ 65
4.6.11. SFF-8639 System Minimum Receiver Path Sensitivity Requirements at 5.0 GT/s ................ 66
4.6.12. SFF-8639 System Minimum Receiver Path Sensitivity Requirements at 8.0 GT/s ................ 68
5. SFF-8639 Connector Specification ....................................................................... 70
5.1. Connector Pinout ...........................................................................................................70
5.2. Signal Integrity Requirements and Test Procedures ......................................................74
5.2.1. Signal Integrity Requirements ................................................................................................. 74
5.2.2. Signal Integrity Requirements and Test Procedures for 8.0 GT/s Support ............................. 74
5.2.2.1. Test Fixture Requirements ................................................................................................ 76
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