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QSFP-DD_Hardware_Specification_Rev_4.0
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更新于2023-03-16
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QSFP-DD硬件规范,适用于200Gb/s和400Gb/s以太网,用于高速线缆开发。
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QSFP-DD Hardware Rev 4.0
1
QSFP-DD MSA
QSFP-DD Hardware Specification
for
QSFP DOUBLE DENSITY 8X PLUGGABLE TRANSCEIVER
Rev 4.0 September 18, 2018
Abstract: This specification defines: the electrical and optical connectors, electrical
signals and power supplies, mechanical and thermal requirements of the pluggable QSFP
Double Density (QSFP-DD) module, connector and cage system. This document provides a
common specification for systems manufacturers, system integrators, and suppliers of
modules.
POINTS OF CONTACT:
Tom Palkert Mark Nowell Scott Sommers
Technical Editor Co-Chair Co-Chair
Molex Cisco Molex
2222 Wellington Court 170 West Tasman Dr 2222 Wellington Court
Lisle, IL 60532-1682 San Jose, CA 95134 Lisle, IL 60532-1682
Ph: 952-200-8542 Ph: 613-254-3391 Ph: 630-527-4317
tom.palkert at molex.com mnowell at cisco.com scott.sommers at molex.com
www.qsfp-dd.com
Limitation on use of Information:
This specification is provided "AS IS" with NO WARRANTIES whatsoever and therefore the
provision of this specification does not include any warranty of merchantability,
noninfringement, fitness for a particular purpose, or any other warranty otherwise
arising out of any proposal, specification or sample. The authors further disclaim all
liability, including liability for infringement of any proprietary rights, relating to
use of information in this specification. No license, express or implied, by estoppel or
otherwise, to any intellectual property rights is granted herein.
Permissions:
You are authorized to download, reproduce and distribute this document. All other rights
are reserved. The provision of this document should not be construed as the granting of
any right to practice, make, use or otherwise develop products that are based on the
document. Any and all IP rights related to this document and the designs disclosed
within, except for the rights expressly mentioned above, are reserved by the respective
owners of those IP rights.
QSFP-DD Hardware Rev 4.0
2
The following are Promoter member companies of the QSFP-DD MSA.
Broadcom LTD
Cisco
Corning
Finisar
Foxconn Interconnect Technology
Huawei LTD
Intel
Juniper Networks
Lumentum
Luxtera
Mellanox
Molex LLC
Oclaro, Inc.
TE Connectivity
The following are contributing member companies of the QSFP-DD MSA.
Acacia
ACON
Alibaba Group
Amphenol
Applied Optoelectronics
Apresia
Cavium
Celestica
Ciena
ColorChip
Credo
DellEMC
Delta Products
Dust Photonics
Eoptolink
Fourte
Fujitsu
Genesis Connected Solutions
H3C
Hisense Broadband
Hitachi Metals
Hewlett Packard Enterprise
InnoLight
Innovium
Inphi
Ixia
JPC
Kaiam
Leoni
Lorom Cable Connection
LuxshareICT
Macom
MaxLinear
MultiLane
NeoPhotonics
Nokia
Panduit
PHY-SI
QSFP-DD Hardware Rev 4.0
3
Ranovus
Samtec
Semtech
Senko
Sicoya
The Siemon Company
Skorpios
Source Photonics
Spectra7 Microsystems
Spirent
Sumitomo Electric
US Conec
Xilinx
Yamaichi
Change History:
Revision
Date
Changes
1.0
Sept 19 2016
First public release
2.0
March 13 2017
Second public release
3.0
Sept 19 2017
Third public release
4.0
Sept 18 2018
Fourth public release,
Additions to thermal
section 6, synchronous
clocking section 4.4,
Mechanical updates
Foreword
The development work on this specification was done by the QSFP-DD MSA, an industry
group. The membership of the committee since its formation in Feb 2016 has included a mix
of companies which are leaders across the industry.
CONTENTS
1
Scope ............................................................................... 7
1.1 Description of Sections ............................................................................................................................................. 7
2 References .......................................................................... 7
2.1 Industry Documents......................................................................................................................................................... 7
2.2 Sources ................................................................................................................................................................................... 8
3 Introduction ........................................................................ 8
3.1 Objectives ............................................................................................................................................................................ 8
3.2 Applications ....................................................................................................................................................................... 9
4 Electrical Specification ............................................................ 9
4.1 Electrical Connector .................................................................................................................................................... 9
4.1.1 Low Speed Electrical Hardware Signals ................................................................................................. 16
4.1.2 Low Speed Electrical Specification ........................................................................................................ 17
4.1.3 Timing for soft control and status functions ................................................................................. 18
4.1.4 High Speed Electrical Specification ...................................................................................................... 21
QSFP-DD Hardware Rev 4.0
4
4.2
Power Requirements....................................................................................................................................................... 22
4.2.1 Power Classes and Maximum Power Consumption ................................................................................... 22
4.2.2 Host Board Power Supply Filtering ........................................................................................................... 22
4.2.3 Module Power Supply Specification ........................................................................................................... 23
4.2.4 Host Board Power Supply Noise Output .................................................................................................... 24
4.2.5 Module Power Supply Noise Output ............................................................................................................. 24
4.2.6 Module Power Supply Noise Tolerance ...................................................................................................... 24
4.3 ESD .......................................................................................................................................................................................... 26
4.4 Clocking Considerations ........................................................................................................................................... 26
4.4.1 Data Path Description ....................................................................................................................................... 26
4.4.2 Tx Clocking Considerations............................................................................................................................ 26
4.4.3 Rx Clocking Considerations............................................................................................................................ 26
5 Mechanical and Board Definition .................................................... 27
5.1 Introduction ..................................................................................................................................................................... 27
5.2 Datums, Dimensions and Component Alignment ............................................................................................. 28
5.3 Module Mechanical Dimensions ............................................................................................................................... 31
5.4 Module Flatness and Roughness ............................................................................................................................ 37
5.5 Module paddle card dimensions ............................................................................................................................ 38
5.6 Module Extraction and Retention Forces ....................................................................................................... 41
5.7 2x1 Electrical Connector Mechanical .............................................................................................................. 42
5.7.1 2x1 Connector and Cage host PCB layout ............................................................................................... 46
5.8 Surface Mount Electrical Connector Mechanical ...................................................................................... 49
5.8.1 Surface mount connector and cage host PCB layout ....................................................................... 55
5.9 Module Color Coding and Labeling ..................................................................................................................... 57
5.10 Optical Interface ......................................................................................................................................................... 58
5.10.1 MPO Optical Cable connections .................................................................................................................... 59
5.10.2 Dual LC Optical Cable connection ............................................................................................................. 61
5.10.3 Dual CS Optical Cable connection ............................................................................................................. 61
5.10.4 Electrical data input/output to optical port mapping .............................................................. 62
6 Environmental and Thermal .......................................................... 62
6.1 Thermal Requirements .................................................................................................................................................. 62
6.2 Thermal Requirements – tighter controlled environments ................................................................. 63
6.3 External Case and Handle Touch Temperature ............................................................................................. 63
7 Management Interface ............................................................... 63
7.1 SCL, SDA and ModSEL Timing Specification .................................................................................................. 64
7.1.1 Introduction ............................................................................................................................................................. 64
7.1.2 Management Interface Timing Specification ........................................................................................ 64
7.1.3 Serial Interface Protocol .............................................................................................................................. 65
Appendix A: Informative overall module length with elastomeric handle attached to module
latches ............................................................................................................................................................................................. 67
QSFP-DD Hardware Rev 4.0
5
Table 1- Pad Function Definition....................................................... 12
Table 2- Low Speed Control and Sense Signals........................................... 18
Table 3- Timing for QSFP-DD soft control and status functions.......................... 19
Table 4- I/O Timing for Squelch & Disable.............................................. 20
Table 5- Power Classes................................................................. 22
Table 6- Power Supply specifications, Instantaneous, sustained and steady state current
limits................................................................................. 25
Table 7- Datums....................................................................... 29
Table 8- Module flatness specifications................................................ 37
Table 9- Insertion, Extraction and Retention Forces.................................... 41
Table 10- Electrical Signal to Optical Port Mapping.................................... 62
Table 11- Temperature Range Class of operation......................................... 62
Table 12- Temperature Range Classes for Tighter Controlled Applications................ 63
Table 13- Management Interface timing parameters....................................... 66
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