OCP Mezzanine card 2.0 Design Specification _pcieclbcbb

需积分: 49 694 浏览量更新于2023-05-26 评论 3 收藏 2.17MB PDF 举报

身份认证购VIP最低享 7 折!

领优惠券(最高得80元）

资源详情

资源评论

资源推荐



OCPMezzaninecard2.0Design

Specification

Version1.00



Author:JiaNing,Engineer,Facebook



Contents



Contents ................................................................................................................................................... 2



Overview .................................................................................................................................................. 4



2.1



License .............................................................................................................................................................. 4



2.2



Background ..................................................................................................................................................... 4



2.3



New Use Cases ............................................................................................................................................... 4



2.4



Major Changes to Form Factor ................................................................................................................. 5



2.5



Major Changes to Electrical Interface ................................................................................................... 5



Mezzanine Card Form Factor ............................................................................................................ 5



3.1



Primary and Secondary Side Definition ................................................................................................ 5



3.2



Mezzanine Card Connectors ..................................................................................................................... 6



3.3



Form Factor Definition in Horizontal Plane ........................................................................................ 7



3.3.1



Optional Area for Connector B .......................................................................................................... 9



3.3.2



Optional Area for I/O ............................................................................................................................ 9



3.3.3



Connector C Area ................................................................................................................................... 9



3.4



Form Factor Vertical Stack Definition ................................................................................................ 10



3.5



Implementation Examples ..................................................................................................................... 12



3.5.1



Single/Dual Port SFP+ 10G/SFP28 25G Ethernet Mezzanine Card (Type 1) ...................... 13



3.5.2



Dual QSFP+ Port 40G Mezzanine Card (Type 1) ......................................................................... 13



3.5.3



Dual QSFP+ Port 40G Mezzanine card (Type 2) ......................................................................... 14



3.5.4



Quad SFP+ port 10G Mezzanine card (Type 3) ........................................................................... 15



3.5.5



Quad port 10G Base-T Mezzanine Card (Type 3) ....................................................................... 16



3.5.6



Dual Port QSFP28 Style A/Style B 50G/100G Mezzanine Card (Type 1) .............................. 17



3.5.7



Quad Port 10GBaseT RJ45 KR Mezzanine card with Connector C (Type 2) ....................... 18



3.5.8



Quad Port 10G SFP+ KR Mezzanine card with Connector C (Type 2) ................................. 18



3.6



Port and LED Location .............................................................................................................................. 19



3.6.1



Port and LED location for Single/Dual SFP+/SFP28 Mezzanine card ................................ 19



3.6.2



Port and LED location for PCIe/KR QSFP+/QSFP28 Mezzanine card ................................. 19



3.6.3



Port and LED location for 4x KR interfaces via a single QSFP+ cage ................................. 20



3.6.4



Port and LED location for Quad RJ45 Mezzanine card ........................................................... 21



3.7



MAC Address label requirement ........................................................................................................... 21



3.8



Plastic Insulation Sheet ........................................................................................................................... 22



Mezzanine Card to Baseboard Electrical Interface ................................................................ 22



4.1



Power Capability and Status on Con nector ...................................................................................... 22



4.2



Pin Definition of Mezzanine Connector ............................................................................................. 24



4.2.1



x16 PCIe Mezzanine Card with Connector A and B ................................................................. 24



4.2.2



16x KR Mezzanine card with Connector A and B ..................................................................... 26



4.2.3



4x KR Mezzanine card with Connector C ................................................................................... 28



Open Compute Project  Mezzanine Card  2.0

Rev1.00

http://opencompute.org 3

4.3 Mezzanine Card Pin Description .......................................................................................................... 28

4.3.1 MEZZ FRU EEPROM ............................................................................................................................ 31

4.3.2 Baseboard ID ....................................................................................................................................... 32

5 Management Interface .................................................................................................................... 34

5.1 I2C side band ............................................................................................................................................... 35

5.2 NC-SI side band ........................................................................................................................................... 35

5.3 MAC address of management inte rface ............................................................................................. 36

6 PCIe Mezzanine NIC Data network .............................................................................................. 36

6.1 Network Booting ........................................................................................................................................ 36

7 Thermal Reporting Interface .......................................................................................................... 36

7.1 Overview of Thermal Reporting Interface ......................................................................................... 36

7.1.1 Emulated Thermal Reporting ......................................................................................................... 36

7.1.2 Remote on-die sensing ..................................................................................................................... 38

8 Environmental .................................................................................................................................... 39

8.1 Environmental Requirements ............................................................................................................... 39

8.1.1 Thermal Simulation Boundary Example .................................................................................... 39



8.2 Shock & Vibration ...................................................................................................................................... 39

8.3 Regulation .................................................................................................................................................... 39

9 Revision History ................................................................................................................................. 39



2 Overview

2.1 License

AsofApril7,2011,thefollowingpersonsorentitieshavemadethisSpecificatio n availableunderthe

OpenWebFoundationFin a l SpecificationAgreement(OWFa1.0),whichisavailable

athttp://www.openwebfoundation.org/legal/the‐owf‐1‐0‐agreements/owfa‐1‐0:

Facebook,Inc.



YoucanreviewthesignedcopiesoftheOpenWebFoundationAgreementVersion

1.0forthis

Specificationathttp://opencompute.or g/licensing/,whichmayalsoincludeadditionalpartiestothose

listedabove.



YouruseofthisSpecificationmaybesubjecttootherthirdpartyrights.THISSP ECIFICATIONIS

PROVIDED"ASIS."Thecontributorsexpresslydisclaimanywarranties(express,implied,orotherwise),

includingimp liedwarrantiesofmer chantability,

non‐infringement,fitnessforaparticularpurpose,or

title,relatedtotheSpecification.TheentireriskastoimplementingorotherwiseusingtheSpecification

isassumedbytheSpecificationimplem enteranduser.INNOEVENTWILLANYPARTYBELIABLETOANY

OTHERPARTYFORLOSTPROFITSORANYFORMOF

INDIRECT,SPECIAL,INCIDE NTAL,OR

CONSEQUENTIALDAMAGESOFANYCHARACTERFROMANYCAUSESOFACTIONOFANYKINDWITH

RESPECTTOTHISSPECIFICATIONORITSGOVERNINGAGREEMENT,WHETHERBASEDONBREACHOF

CONTRACT,TORT(INCLUDINGNEGLIGENCE),OROT HERWISE,ANDWHETHERORNOTTHEOTHER

PARTYHASBEENADVISEDOFTHEPOSSIBILITY

OFSUCHDAMAGE.

2.2 Background

TheoriginalOCPMezzanineCardforIntelv2.0Motherboardspecification

havebeendevelopedmainly

toservetheusecaseofSingleandDualport10GEthernetcard.Adoptionofthisspecifi cationhasbeen 

seeninOCPcommunityondifferentserverandstorageplatforms.Overtherecenttwo years,demand

ofsupportingnewusecaseswereraisedandtheoriginalMezzanine

cardspecificationcannotsupport

thosenewusecaseswithoutmodificationinordertosupportdifferentI/Otypes,increasebandwidthof

dataandmanagement,andsupporthigherpowercontrollerIC.



Mezzaninecard2.0specificationisdevelopedbasedonoriginalOCPMezzaninecard.Itextendsthecard

mechanicalandelectricalinterfacetoenable

newusescasesforFacebookandotherusersinOCP

community.TheextensiontakesbackwardcompatibilitytoexistingOCPplatforms desig nedfororiginal

OCPMezzaninecardspeci fication V0.5intoconsideration,andsometradeoffsaremadebetween

backwardcompatibilityandnewrequirements.

2.3 NewUseCases

Thesenewmajorusecasesaretakenintoconsiderationinthisspecification.

 SingleandDualQSFP+port40G/50G/100GEthernetNIC

 SingleandDualSFP+port25GEthernetNIC

 QuadSFP+Port10GNIC

 Single,DualandQuadport10GBase‐TNIC

 x16PCIelanetobaseboard



http://www.opencompute.org/assets/download/Intel-Mezzanine-Card-Design-Specification-

v0.5.pdf

Open Compute Project  Mezzanine Card  2.0

Rev1.00

http://opencompute.org 5

 16xKRtobaseboard

 NICcontrollerwithhighTDPthatneedsmoreheatsinkvolume

 ManagementsidebandtosupportusecasesuchasremoteSystemFirmwareupdate

 BaseboardandMezzaninecardidentification

 KRMezzaninecarddesignwithlowspeedandI2Csignalsthatcannotbefit

inoriginalOCP

Mezzanine

 Systemdesigntosupportx16PCIeandKRwithoutBOMchange

 Systemdesignthathasmorelimitedverticalspace



TheMezzaninecard2.0specificationmakeschangeonasneededbasetomaximizebackward

compatibilitytoexistingOCPplatforms.Somemodificationimpactsbackwardcompatibilityto

existing

OCPplatformsandcompatibilitycheckneedtobedone.

2.4 MajorChangestoFormFactor

Toaccommodatethenewusescasesabove,majorchangestoformfactorarelistedasbelow.More

detaileddescriptioncanbefoundinChapter3.

 ExtendPCBareatosupportConnectorBtobaseboard

 ExtendPCBareatosupportI/Ointerface

 AddoptiontohaveI/OonSecondary

sidetosupportI/Ointerface

 Add12mmstackingoptiontosupporthighervolumeheatsink

 Add5mmstackingoptiontosupportsystemwithlimitedverticalspace

 AddConnectorCoptionforKRMezz

2.5 MajorChangestoElectricalInterface

Toaccommodatethenewusescasesabove,majorchangestoelectricalinterfacearelistedasbelow.

Moredetaileddescriptioncanbefoundinchapter3.8

 Modifyoriginal120pinconnectortohaveNC‐SIsignals;thisistheoriginalOCPMezzaninecard

connector;itisreferredtoConnectorAin

thisspecification

 Add80pinconnectoronMezzaninecard interfaceinordertoexpendPCIelanewidth fromx8

tox16;itisreferredtoConnectorBinthisspecification

 Add64pinconnectoronMezzaninecard interfaceinordertosupportKRMezzaninecarddesign

withlow

speedandI2Csignals;itisreferredtoConnectorCinthisspecification.

 AddcardIDmechanismforbaseboardtoidentifydifferenttypesofMezzaninecards

 Adddefinitionofthermalreportinginterfacetosupporttemperaturebasedsystemfanspeed

control

3 MezzanineCardFormFactor

Mezzaninecardformfactorisdescribedinthischapter.Vendorshouldreferto2D DXFand3Dfilesfor

dimension,tolerance,andheightrestrictiondetails.

3.1 PrimaryandSecondarySideDefinition

Primarysideandsecondarysideareusedtorefertothetwosidesofmezzaninecardinthisdocument.

PrimarysideisthesidewithMezzanineboardtoboardconnector.Exampleofprimarysideand

secondarysideisshowninFigure1.



剩余40页未读，继续阅读

talk2012

粉丝: 0
资源: 5

会员权益专享

OCP Mezzanine card 2.0 Design Specification

评论0

会员权益专享

最新资源

OCP Mezzanine card 2.0 Design Specification

评论0

OCP_NIC_3.0_R1v00_20191219a_TN_no_CB.pdf

ocp nic的main power domain

Oracle 12C OCP题库

ocp nic 3.0 spec

oracle数据库ocp考试

ocp考试071,062,063

OCA OCP Java SE 7 Programmer I - II Study Guide(SYBEX,2014)

MySQL OCP 5.6 5.7题库标准答案

2018 OCP 1z0-071 最新题库

Oracle课程之OCP免费教学视频

oracle升级OCP到12c考试题库 Oracle-1z0-060

OCP Java SE 8 Programmer II Exam Guide (Exam 1Z0-809)

MySQL 5.7 OCP

OCP_NIC_3.0_R1v10_20201029a_TN_CB.pdf

mysql ocp真题

ocp甲骨文认证专业javase8程序员二级考试学习指南 1z0_809

OCP NIC 3.0 SFF Schematic Diagram Example R1v00_20191218a_TN.pdf

会员权益专享

最新资源