OCP Mezzanine card 2.0 Design Specification _Open_Compute_Project_Open_Rack_v1.0.pdf

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OCPMezzaninecard2.0Design

Specification

Version1.00



Author:JiaNing,Engineer,Facebook

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Contents

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Contents ................................................................................................................................................... 2



Overview .................................................................................................................................................. 4

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2.1

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License .............................................................................................................................................................. 4

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2.2

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Background ..................................................................................................................................................... 4

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2.3

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New Use Cases ............................................................................................................................................... 4

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2.4

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Major Changes to Form Factor ................................................................................................................. 5

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2.5

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Major Changes to Electrical Interface ................................................................................................... 5

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Mezzanine Card Form Factor ............................................................................................................ 5

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3.1

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Primary and Secondary Side Definition ................................................................................................ 5

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3.2

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Mezzanine Card Connectors ..................................................................................................................... 6

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3.3

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Form Factor Definition in Horizontal Plane ........................................................................................ 7

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3.3.1

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Optional Area for Connector B .......................................................................................................... 9

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3.3.2

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Optional Area for I/O ............................................................................................................................ 9

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3.3.3

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Connector C Area ................................................................................................................................... 9

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3.4

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Form Factor Vertical Stack Definition ................................................................................................ 10

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3.5

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Implementation Examples ..................................................................................................................... 12

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3.5.1

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Single/Dual Port SFP+ 10G/SFP28 25G Ethernet Mezzanine Card (Type 1) ...................... 13

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3.5.2

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Dual QSFP+ Port 40G Mezzanine Card (Type 1) ......................................................................... 13

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3.5.3

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Dual QSFP+ Port 40G Mezzanine card (Type 2) ......................................................................... 14

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3.5.4

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Quad SFP+ port 10G Mezzanine card (Type 3) ........................................................................... 15

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3.5.5

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Quad port 10G Base-T Mezzanine Card (Type 3) ....................................................................... 16

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3.5.6

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Dual Port QSFP28 Style A/Style B 50G/100G Mezzanine Card (Type 1) .............................. 17

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3.5.7

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Quad Port 10GBaseT RJ45 KR Mezzanine card with Connector C (Type 2) ....................... 18

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3.5.8

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Quad Port 10G SFP+ KR Mezzanine card with Connector C (Type 2) ................................. 18

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3.6

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Port and LED Location .............................................................................................................................. 19

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3.6.1

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Port and LED location for Single/Dual SFP+/SFP28 Mezzanine card ................................ 19

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3.6.2

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Port and LED location for PCIe/KR QSFP+/QSFP28 Mezzanine card ................................. 19

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3.6.3

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Port and LED location for 4x KR interfaces via a single QSFP+ cage ................................. 20

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3.6.4

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Port and LED location for Quad RJ45 Mezzanine card ........................................................... 21

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3.7

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MAC Address label requirement ........................................................................................................... 21

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3.8

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Plastic Insulation Sheet ........................................................................................................................... 22

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Mezzanine Card to Baseboard Electrical Interface ................................................................ 22

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4.1

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Power Capability and Status on Con nector ...................................................................................... 22

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4.2

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Pin Definition of Mezzanine Connector ............................................................................................. 24

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4.2.1

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x16 PCIe Mezzanine Card with Connector A and B ................................................................. 24

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4.2.2

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16x KR Mezzanine card with Connector A and B ..................................................................... 26

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4.2.3

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4x KR Mezzanine card with Connector C ................................................................................... 28

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Open Compute Project  Mezzanine Card  2.0

Rev1.00

http://opencompute.org 3

4.3 Mezzanine Card Pin Description .......................................................................................................... 28

4.3.1 MEZZ FRU EEPROM ............................................................................................................................ 31

4.3.2 Baseboard ID ....................................................................................................................................... 32

5 Management Interface .................................................................................................................... 34

5.1 I2C side band ............................................................................................................................................... 35

5.2 NC-SI side band ........................................................................................................................................... 35

5.3 MAC address of management inte rface ............................................................................................. 36

6 PCIe Mezzanine NIC Data network .............................................................................................. 36

6.1 Network Booting ........................................................................................................................................ 36

7 Thermal Reporting Interface .......................................................................................................... 36

7.1 Overview of Thermal Reporting Interface ......................................................................................... 36

7.1.1 Emulated Thermal Reporting ......................................................................................................... 36

7.1.2 Remote on-die sensing ..................................................................................................................... 38

8 Environmental .................................................................................................................................... 39

8.1 Environmental Requirements ............................................................................................................... 39

8.1.1 Thermal Simulation Boundary Example .................................................................................... 39

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8.2 Shock & Vibration ...................................................................................................................................... 39

8.3 Regulation .................................................................................................................................................... 39

9 Revision History ................................................................................................................................. 39

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2 Overview

2.1 License

AsofApril7,2011,thefollowingpersonsorentitieshavemadethisSpecificatio n availableunderthe

OpenWebFoundationFin a l SpecificationAgreement(OWFa1.0),whichisavailable

athttp://www.openwebfoundation.org/legal/the‐owf‐1‐0‐agreements/owfa‐1‐0:

Facebook,Inc.



YoucanreviewthesignedcopiesoftheOpenWebFoundationAgreementVersion

1.0forthis

Specificationathttp://opencompute.or g/licensing/,whichmayalsoincludeadditionalpartiestothose

listedabove.



YouruseofthisSpecificationmaybesubjecttootherthirdpartyrights.THISSP ECIFICATIONIS

PROVIDED"ASIS."Thecontributorsexpresslydisclaimanywarranties(express,implied,orotherwise),

includingimp liedwarrantiesofmer chantability,

non‐infringement,fitnessforaparticularpurpose,or

title,relatedtotheSpecification.TheentireriskastoimplementingorotherwiseusingtheSpecification

isassumedbytheSpecificationimplem enteranduser.INNOEVENTWILLANYPARTYBELIABLETOANY

OTHERPARTYFORLOSTPROFITSORANYFORMOF

INDIRECT,SPECIAL,INCIDE NTAL,OR

CONSEQUENTIALDAMAGESOFANYCHARACTERFROMANYCAUSESOFACTIONOFANYKINDWITH

RESPECTTOTHISSPECIFICATIONORITSGOVERNINGAGREEMENT,WHETHERBASEDONBREACHOF

CONTRACT,TORT(INCLUDINGNEGLIGENCE),OROT HERWISE,ANDWHETHERORNOTTHEOTHER

PARTYHASBEENADVISEDOFTHEPOSSIBILITY

OFSUCHDAMAGE.

2.2 Background

TheoriginalOCPMezzanineCardforIntelv2.0Motherboardspecification

havebeendevelopedmainly

toservetheusecaseofSingleandDualport10GEthernetcard.Adoptionofthisspecifi cationhasbeen 

seeninOCPcommunityondifferentserverandstorageplatforms.Overtherecenttwo years,demand

ofsupportingnewusecaseswereraisedandtheoriginalMezzanine

cardspecificationcannotsupport

thosenewusecaseswithoutmodificationinordertosupportdifferentI/Otypes,increasebandwidthof

dataandmanagement,andsupporthigherpowercontrollerIC.



Mezzaninecard2.0specificationisdevelopedbasedonoriginalOCPMezzaninecard.Itextendsthecard

mechanicalandelectricalinterfacetoenable

newusescasesforFacebookandotherusersinOCP

community.TheextensiontakesbackwardcompatibilitytoexistingOCPplatforms desig nedfororiginal

OCPMezzaninecardspeci fication V0.5intoconsideration,andsometradeoffsaremadebetween

backwardcompatibilityandnewrequirements.

2.3 NewUseCases

Thesenewmajorusecasesaretakenintoconsiderationinthisspecification.

 SingleandDualQSFP+port40G/50G/100GEthernetNIC

 SingleandDualSFP+port25GEthernetNIC

 QuadSFP+Port10GNIC

 Single,DualandQuadport10GBase‐TNIC

 x16PCIelanetobaseboard



http://www.opencompute.org/assets/download/Intel-Mezzanine-Card-Design-Specification-

v0.5.pdf

Open Compute Project  Mezzanine Card  2.0

Rev1.00

http://opencompute.org 5

 16xKRtobaseboard

 NICcontrollerwithhighTDPthatneedsmoreheatsinkvolume

 ManagementsidebandtosupportusecasesuchasremoteSystemFirmwareupdate

 BaseboardandMezzaninecardidentification

 KRMezzaninecarddesignwithlowspeedandI2Csignalsthatcannotbefit

inoriginalOCP

Mezzanine

 Systemdesigntosupportx16PCIeandKRwithoutBOMchange

 Systemdesignthathasmorelimitedverticalspace



TheMezzaninecard2.0specificationmakeschangeonasneededbasetomaximizebackward

compatibilitytoexistingOCPplatforms.Somemodificationimpactsbackwardcompatibilityto

existing

OCPplatformsandcompatibilitycheckneedtobedone.

2.4 MajorChangestoFormFactor

Toaccommodatethenewusescasesabove,majorchangestoformfactorarelistedasbelow.More

detaileddescriptioncanbefoundinChapter3.

 ExtendPCBareatosupportConnectorBtobaseboard

 ExtendPCBareatosupportI/Ointerface

 AddoptiontohaveI/OonSecondary

sidetosupportI/Ointerface

 Add12mmstackingoptiontosupporthighervolumeheatsink

 Add5mmstackingoptiontosupportsystemwithlimitedverticalspace

 AddConnectorCoptionforKRMezz

2.5 MajorChangestoElectricalInterface

Toaccommodatethenewusescasesabove,majorchangestoelectricalinterfacearelistedasbelow.

Moredetaileddescriptioncanbefoundinchapter3.8

 Modifyoriginal120pinconnectortohaveNC‐SIsignals;thisistheoriginalOCPMezzaninecard

connector;itisreferredtoConnectorAin

thisspecification

 Add80pinconnectoronMezzaninecard interfaceinordertoexpendPCIelanewidth fromx8

tox16;itisreferredtoConnectorBinthisspecification

 Add64pinconnectoronMezzaninecard interfaceinordertosupportKRMezzaninecarddesign

withlow

speedandI2Csignals;itisreferredtoConnectorCinthisspecification.

 AddcardIDmechanismforbaseboardtoidentifydifferenttypesofMezzaninecards

 Adddefinitionofthermalreportinginterfacetosupporttemperaturebasedsystemfanspeed

control

3 MezzanineCardFormFactor

Mezzaninecardformfactorisdescribedinthischapter.Vendorshouldreferto2D DXFand3Dfilesfor

dimension,tolerance,andheightrestrictiondetails.

3.1 PrimaryandSecondarySideDefinition

Primarysideandsecondarysideareusedtorefertothetwosidesofmezzaninecardinthisdocument.

PrimarysideisthesidewithMezzanineboardtoboardconnector.Exampleofprimarysideand

secondarysideisshowninFigure1.



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