STM32F407ZGT6__复用功能映射表_stm32f407复用表,gd32f407和stm32f407区别

STM32F407ZGT

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Pinouts and pin description STM32F405xx, STM32F407xx

56/167 Doc ID 022152 Rev 2

Table 7. Alternate function mapping

Port

AF0 AF1 AF2 AF3 AF4 AF5 AF6 AF7 AF8 AF9 AF10 AF11 AF12 AF13

AF014 AF15

SYS TIM1/2 TIM3/4/5 TIM8/9/10/11 I2C1/2/3

SPI1/SPI2/

I2S2/I2S2ext

SPI3/I2Sext/

I2S3

USART1/2/3/

I2S3ext

UART4/5/

USART6

CAN1/CAN2/

TIM12/13/14

OTG_FS/ OTG_HS ETH

FSMC/SDIO/

OTG_FS

DCMI

PA 0

TIM2_CH1

TIM2_ETR

TIM 5_CH1 TIM8_ETR USART2_CTS UART4_TX ETH_MII_CRS EVENTOUT

PA1 TIM2_C

H2 T

IM5_C

H2 US

ART2_RTS UART4_RX

ETH_MII _RX_CLK

ETH_RMII _REF_CLK

EVENTOUT

PA2 TIM2_C

H3 TI

M5_C

TIM9_CH1

SAR

T2_TX

ETH_MDIO EVENTOUT

PA3 TIM2_C

H4 TI

M5_C

TIM9_CH2 USART2

_RX

OTG_HS_ULPI_D0 ETH _MII_COL EVENTOUT

PA 4 SPI1_NSS

SPI3_NSS

I2S3_WS

USART2_CK OTG_HS_SOF DCMI_

HSYNC EVENT

OUT

PA 5

TIM2_CH1

TIM2_ETR

TIM8_CH1N

SPI1_SCK O

TG_HS_ULPI_CK EVENTOUT

PA6 TIM1_BKI

N TI

M3_CH1 TIM8_BKI

SPI1_MIS

TIM13_

CH1

DCMI_PIXCK EVENTOUT

PA7 TIM1_CH1N

IM3_CH2 TIM8_CH1N SPI1_MOS

TIM14_

CH1

H_MII _RX_DV

ETH_RMII _CRS_DV

EVENTOUT

PA8 MCO1 TIM1_C

H1 I2C3_SCL

USART1

_CK

OTG_FS_SOF EVENTOUT

PA9 TIM1_C

H2 I2C3_

SMBA USART1_T

X DCMI

D0 EVENT

OUT

PA10 TIM1_CH3 USART1

_RX O

TG_FS_ID DCMI_D1 EVENTOUT

PA11 TIM1_CH4 USART1_C

TS CAN

1_RX OTG_FS_DM EVENTOUT

PA12 TIM1_ETR USART1_RTS

N1_TX OTG_FS_DP EVENTOUT

PA 1 3 J T M S - S WD I O EVENTOUT

PA14 JTCK-SWCLK EVENTOUT

PA 1 5 J T D I

TIM 2_CH1

TIM 2_ETR

SPI1_NSS

SPI3_NSS/

I2S3S_WS

EVENTOUT

PB0 TIM1_CH2N

IM3_CH3 TIM8_CH2N OTG_HS_ULPI_D1 ETH _MII_RXD2 EVENTOUT

PB1 TIM1_CH3N

IM3_CH4 TIM8_CH3N OTG_HS_ULPI_D2 ETH _MII_RXD3 OTG_HS_INTN EVENTOUT

PB2 EVENTOUT

PB3

JTDO/

TRACESWO

TIM2_C

H2 SPI1_SCK

PI3_SCK

I2S3_CK

EVENTOUT

PB4 JTRST

IM3_C

SPI1_MISO SPI3_MISO I2S3ext_SD EVENTOUT

PB5 TIM3_C

H2 I2C1_

SMBA SPI1_MOS

SPI

3_MOSI

I2S3_SD

CAN2_RX OTG_HS_ULPI_D7 ETH _PPS_OUT DCMI_D10 EVENTOUT

PB6 TIM4_C

H1 I

2C1_SCL I2S2_WS USART

1_TX CAN2_TX

DCMI_D5 EVENTOUT

PB7 TIM4_C

H2 I2C

1_SDA USART1

_RX F

SMC_NL DCMI_VSYNC EVENTOUT

PB8 TIM4_C

H3 T

IM10_CH1 I2C1

_SCL CAN1_RX ET

H _MII_TXD3 SDIO_D4 DCMI_D6 EVENTOUT

PB9 TIM4_C

H4 T

IM11_CH1 I2C1_SDA

SPI2_NSS

I2S2_WS

CAN1_TX SDI

O_D

DCMI_D7 EVENTOUT

PB10 TIM2_C

H3 I2C2_SCL

SPI

2_SCK

I2S2_CK

USAR

T3_TX O

TG_HS_ULPI_D3 ETH_ MII_RX_ER EVENTOUT

PB11 TIM2_C

H4 I2C

2_SDA USART3

_RX

OTG_HS_ULPI_

ETH _MI

I_TX_EN

ETH _RMII_TX_EN

EVENTOUT

PB12 TIM1_BKI

N I

2C2_SMBA

SPI2_NSS

I2S2_WS

USART3

_CK CAN

2_RX OTG_HS_ULPI_

ETH _MII_

TXD0

ETH _RMII_TXD0

OTG_HS_ID EVENTOUT

PB13 TIM1_CH1N

SPI2_SCK

I2S2_CK

USART3_C

TS CAN2_T

X OTG_HS_ULPI_

ETH _MII_

TXD1

ETH _RMII_TXD1

EVENT

OUT

PB14 TIM1_CH2N

M8_CH2N SPI2_MISO I2S2ext_SD USART3_RTS TIM12_

CH1

G_HS_DM

EVENTOUT

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