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首页IMX230_Software_Reference_Manual_1.0.6.pdf
IMX230 is a diagonal 5.867 (Type1/2.4) 21Mega-pixel CMOS active pixel type stacked image sensor with a square pixel array. It adopts Exmor-RSTM technology to achieve high speed image capturing by column parallel ADC circuits and high sensitivity and low noise image
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Copyright 2014, 2015, 2016 Sony Semiconductor Solutions Corporation
1
IMX230 Application Note
IMX230
Software Reference Manual
Ver.1.0.6
2016/06/08
Mobile Imaging System Business Division
Sony Semiconductor Solutions Corporation
Copyright 2014, 2015, 2016 Sony Semiconductor Solutions Corporation
2
Revision History
Version Date Description
0.0.6 2014.09.12 First release
0.0.7 2014.11.14 Revise : Table number & Figure number (Chapter 9)
Revise : Fig 2-18, layout of setting 1/2/3 arrow
Revise : Table 4-1, bit count of X_ADD_STA, Y_ADD_STA, X_ADD_END &
Y_ADD_END
Update : Table 4-9, description of 0x3A20 and 0x3A21 address
Revise: Table 5-1, 0x0305 Range : 1 to 4
Update : Table 5-9, 5-10, 5-11, shown effective pixel number of horizontal line
Update : Figure 5-9, name of offset & image width/height
Revise : Table 5-12, HDR_MODE[0]
Revise : Table 5-18, SCALE_MODE[1:0]
Revise : Fig 8-5, remove unnecessary part
Revise : 9.1 Thermal meter
Remove : Paragraph “9.4.4 FSTROBE (80 pin) output setting”, this content is covered
by “9.7 Monitor terminal settings”
Add : Section “9.6 Pulse for OIS”
Add : Section “9.7 Monitor terminal settings”
Add : Section “9.8 Dual camera operation with shared CCI bus”
Merge Chapter “10. Lens Shading Correction (LSC)”
from "IMX230 Software
Reference Manual for LSC(0.0.1)" &
Revise : Figure 10-5, LSC update setting (Fig 1-5 on Software Reference Manual for
LSC(0.0.1))
Change chapter number, “11. REGISTER MAP”
0.0.8 2014.12.05 Update : Table 3-7, 0x0808 description
Update : Table 4-5/Table 8-6, description of 0x3000/3011/3013, and add notation (*)
Revise : Table 4-9, address of EBD_X_OUT_SIZE(0x3A00/0x3A01)
Revise : Table 5-13, HDR_MODE[0]
Change : 5.7.4 Chroma noise reduction, from "skip access mode" to "Sub-sampling
mode"
Update : Table 5-9, 5-10, 5-11, Add max FPS value
Revise : Table 8-13 ATR control registers, address of ATR_INIT_HOLD(0x3a20)
0.0.9 2015.01.09 Update : Index
Update : Figure 8-1
Revise : Table 5-27 Digital gain setting, range of DIG_GAIN_GR/R/B/GB
Revise : Table 5-21 & Table 7-5, 0x0350 formula in description
Revise : 9.1.3, replace word from "IMX214" to "IMX230”
Revise : Table 10-1, description([0] bit) of 0x0B00
0.0.10 2015.02.05 Revise : Table 8-14, address of ATR_INIT_HOLD (0x3A20)
Revise : 5.6.2 Test mode setting, Table 5-31 : address 0x6307 and name/description
Replace : sentence(In STATS data --- from long exposure pixels) under Table 8-7
Copyright 2014, 2015, 2016 Sony Semiconductor Solutions Corporation
3
0.0.11 2015.02.26 Revise : Table 5-6, VTPXCK_DIV range
Revise : Table 8-13, RG_ATR_TRMODE description
Revise : Table 8-14, address of ATR_INIT_HOLD(0x3A20) and add the notation
Revise : Figure 9-13, SW-standby sequence
0.1.0 2015.05.01 Update : Glossary
Revise : Table 7-5, description of VTPXCK_DIV
Revise : Table 5-14, add 0x21 as setting value of HDR_MODE
Update : Table 5-21, the description of FRM_LENGTH_CTL.
Revise : Figure 4-8 and 4-9, the reference table number (Table 4-7)
Revise : Table 5-14, description of 0x0221
Revise : Title of Figure 5-4
Update : Figure 5-9 font size
Revise 5.4.2 Integration time calculation, remove unnecessary parenthetical mark
of Tsh equation
Update : chapter number and change of order, 9.8.4 and 9.9
Revise : 9.7 Monitor terminal settings, explanation of terminals
Update : Table 9-15 and Table 9-16, FSTROBE is removed
Update : 2.7.3 Example of using grouped parameter hold continuously, explanation
update and reference Figure number revised
Update : Figure 5-3
Revise : Figure 2-15, add notation (*1 and *2)
Revise : Table 5-14, value 0x01 and 0x02 are removed.
Update : 5.7.1 and 5.7.2, explanation update
Update : 5.7.4 and 5.7.5, explanation update
Revise : Table 8-1, add ANA_GAIN_GLOBAL and ST_ANA_GAIN_GLOBAL
Revise : Figure 8-1, ARNR block added
Update : 8.4.2, explanation update
Revise : Figure 8-7, typo update
Revise : 9.8, title update
Update : 9.8.1 and 9.8.2, change the order of the explanation
Update : 9.9, explanation update and Table 9-19
Update : 8.6.4.2, explanation update
Update : 8.7 and 8.8, explanation update
Update : Table 8-14, notation
Update : Figure 8-24 and Figure 9-3
Revise : A-2 Table A-4 EBD LINE1, 0x0217 ST_ANA_GAIN_GLOBAL[7:0]
1.0.0 2015.06.03 Revise : Figure 1-1 “row decoder” is located correctly
Revise : Figure 2-15, repair of collapsed figure
Revise : Section 5.5.2, typo (incrimination -> incrementation)
Revise : Table 5-29, add column of BINNING_ADD_OPTION
Revise : Figure 8-7, typo(Binming -> Binning)
Delete : Section 8.8 DPCM and Sec 8.7 related sentence
Revise : Figure 8-23, ATR_INIT_HOLD address : 0x3A20
Copyright 2014, 2015, 2016 Sony Semiconductor Solutions Corporation
4
1.0.1 2015.08.25 Revise : Table 7-5 and Figure 7-1, 7-2, 7-3, 7-17, 7-19 : typo (stanby -> standby)
Update : Table 4-4, add max value of LINE_LENGTH_PCK
Revise : Table 5-15, remove notation*1
1.0.2 2015.11.19 Revise : Table 5-15 and Table 5-31 (additional -> addition)
Add : Table 5-16 Comparison sample of binning weighting setting
1.0.3 2015.12.25 Revise : Table 5-34, add 0x6818 and the notation
Revise : Figure 5-15, add RG_DPC2D_DYNAMIC and the notation
Revise : Table 7-5, Description of FRM_LENGTH_CTL(0x0350)
Update : Table 9-9, add the notation
Update : Table 9-15 and Table 9-16, add FSTROBE
1.0.4 2016.05.18 Revise : Chapter 5.2.4, one-third(1/3) description is incorrect, and deleted
Revise : Table 5-30, value of Upper:3(dec)/Lower:51(dec) (“3” -> “3.20”)
1.0.5 2016.05.24 Revise : Table 5-17, remove incorrect sample values and add notation
1.0.6 2016.06.08 Add : 10.5 Constrained condition of LSC
Copyright 2014, 2015, 2016 Sony Semiconductor Solutions Corporation
5
Note
"Software Reference Manual for PDAF" document is available also.
The documents which are described as the reference for details in this document may not be issued yet.
In this specification, it covers the major F/W or H/W registers with functionality explanation, however the
default value which set by Sony is not written. Because H/W or F/W default value is sometimes updated
faster than document update timing. See "Register setting"(excel sheet) for the latest default value shown
as "Global Setting" in.
There are two types of “default value”.
- H/W default value: is a default value that is embedded with metal wiring into the silicon. It is decided
in very early stage of device design and cannot be changed afterward. These values can be found
in the Register Map.
- S/W default value: is a default valued that is recommended value and/or bug fix values to be
externally over writing H/W default values after evaluation of engineering samples. These values
are shown in Register setting. Sony recommended register setting table or customer unique register
setting table will be supplied upon request.
SRM-230-100
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