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8.2.6 Source and Destination Increment ............................................................................. 99
8.2.7 DMA Transfer Mode .............................................................................................. 99
8.2.8 DMA Priority ..................................................................................................... 100
8.2.9 Byte or Word Transfers ........................................................................................ 100
8.2.10 Interrupt Mask .................................................................................................. 100
8.2.11 Mode 8 Setting ................................................................................................. 100
8.3 DMA Configuration Setup ............................................................................................... 100
8.4 Stopping DMA Transfers ................................................................................................ 101
8.5 DMA Interrupts ........................................................................................................... 101
8.6 DMA Configuration Data Structure .................................................................................... 101
8.7 DMA Memory Access ................................................................................................... 101
8.8 DMA Registers ........................................................................................................... 104
9 Timer 1 (16-Bit Timer) ....................................................................................................... 107
9.1 16-Bit Counter ............................................................................................................ 108
9.2 Timer 1 Operation ........................................................................................................ 108
9.3 Free-Running Mode ..................................................................................................... 108
9.4 Modulo Mode ............................................................................................................. 108
9.5 Up/Down Mode ........................................................................................................... 109
9.6 Channel-Mode Control .................................................................................................. 109
9.7 Input Capture Mode ..................................................................................................... 109
9.8 Output Compare Mode .................................................................................................. 110
9.9 IR Signal Generation and Learning .................................................................................... 115
9.9.1 Introduction ...................................................................................................... 115
9.9.2 Modulated Codes ............................................................................................... 115
9.9.3 Non-Modulated Codes ......................................................................................... 116
9.9.4 Learning .......................................................................................................... 117
9.9.5 Other Considerations ........................................................................................... 117
9.10 Timer 1 Interrupts ........................................................................................................ 117
9.11 Timer 1 DMA Triggers ................................................................................................... 117
9.12 Timer 1 Registers ........................................................................................................ 118
9.13 Accessing Timer 1 Registers as Array ................................................................................ 123
10 Timer 3 and Timer 4 (8-Bit Timers) ..................................................................................... 125
10.1 8-Bit Timer Counter ...................................................................................................... 126
10.2 Timer 3/Timer 4 Mode Control ......................................................................................... 126
10.2.1 Free-Running Mode ........................................................................................... 126
10.2.2 Down Mode ..................................................................................................... 126
10.2.3 Modulo Mode ................................................................................................... 126
10.2.4 Up/Down Mode ................................................................................................. 126
10.3 Channel Mode Control .................................................................................................. 126
10.4 Input Capture Mode ..................................................................................................... 127
10.5 Output Compare Mode .................................................................................................. 127
10.6 Timer 3 and Timer 4 Interrupts ......................................................................................... 127
10.7 Timer 3 and Timer 4 DMA Triggers ................................................................................... 128
10.8 Timer 3 and Timer 4 Registers ......................................................................................... 128
11 Sleep Timer ..................................................................................................................... 133
11.1 General .................................................................................................................... 134
11.2 Timer Compare ........................................................................................................... 134
11.3 Timer Capture ............................................................................................................ 134
11.4 Sleep Timer Registers ................................................................................................... 135
12 ADC ............................................................................................................................... 137
12.1 ADC Introduction ......................................................................................................... 138
12.2 ADC Operation ........................................................................................................... 138
5
SWRU191C–April 2009–Revised January 2012 Contents
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