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Marvell. Moving Forward Faster
Doc. No. MV-S107228-00, Rev. --
August 20, 2013
CONFIDENTIAL
Document Classification: Proprietary Information
Cover
Link Street
®
88E6172/88E6176
Datasheet
Low Power 7 Port Gigabit Switch
with Energy Efficient Ethernet (EEE)

Document Conventions
Note: Provides related information or information of special importance.
Caution: Indicates potential damage to hardware or software, or loss of data.
Warning: Indicates a risk of personal injury.
Document Status
Doc Status: Draft Technical Publication: 0.17
For more information, visit our website at: www.marvell.com
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of Marvell or its affiliates.
Patent(s) Pending—Products identified in this document may be covered by one or more Marvell patents and/or patent applications..
Doc. No. MV-S107228-00 Rev. -- CONFIDENTIAL Copyright © 2013 Marvell
Page 2 Document Classification: Proprietary Information August 20, 2013, Draft
Not Approved by Document Control. For Review Only.
Link Street
®
88E6172/88E6176 Datasheet
Low Power 7 Port Gigabit Switch with Energy Efficient Ethernet (EEE)

Link Street
®
88E6172/88E6176 Datasheet
Low Power 7 Port Gigabit Switch with Energy
Efficient Ethernet (EEE)
Copyright © 2013 Marvell CONFIDENTIAL Doc. No. MV-S107228-00 Rev. --
August 20, 2013, Draft Document Classification: Proprietary Information Page 3
Not Approved by Document Control. For Review Only.
OVERVIEW
The Marvell
®
88E6172/88E6176 devices are single-chip
integrations of a 7-port Gigabit Ethernet switches with
five integrated Gigabit Ethernet transceivers. This device
supports “Best in Class” Quality of Service (QoS) and the
highest “real world” performance. This device is uniquely
suited for Small Office Home Office (SOHO) and
Small-to-Medium Business (SMB) applications.
The device contains five 10/100/1000 triple speed
Ethernet transceivers (PHYs), one Gigabit SERDES
(88E6176 device only), and two digital interfaces that
support a combination of GMII, RGMII, MII, and RMII
interfaces in a 128-pin QFP package.
The device has a high-speed, non-blocking four traffic
class QoS switch fabric that uses the unique Marvell
Dynamic Queue Limit architecture. The QoS architecture
switches packets into one of four traffic class queues
based upon Port, IEEE 802.1p, IPv4 Type of Service
(TOS) or Differentiated Services (Diff-Serv), IPv6 Traffic
Class, 802.1Q VLAN ID, DA MAC address or SA MAC
address. The device also contains a high-performance
address lookup engine with support for up to 8K active
nodes, and a 1 Mbit frame buffer memory. Back-pressure
and pause frame-based flow control schemes are
included to support zero packet loss under temporary
traffic congestion. The MAC units in the devices comply
fully with the applicable sections of IEEE 802.3 and
support frame sizes up to 10KBytes.
The sixth and seventh ports’ interfaces support a direct
connection to Management or Router CPUs with inte-
grated MACs. These interfaces, along with BPDU han-
dling for IEEE 802.1D Spanning Tree Protocol, 802.1w
Rapid Spanning Tree, 802.1s Multiple VLAN Spanning
Tree, programmable per-port VLAN configurations,
802.1Q and Port States, support fully managed switches
and truly isolated WAN vs. LAN firewall applications. The
device supports 4,096 802.1Q VLAN IDs which can be
enabled on a per port basis. Three levels of 802.1Q
security is supported with error frame trapping and log-
ging.
The device supports multiple address databases (up to
4096), which allows packet routing without modification
of the MAC address. This allows the same MAC address
to exist multiple times in the MAC Address database with
multiple port mappings, to completely isolate the WAN
from the LAN database.
The 88E6176 device’s Gigabit SERDES interface sup-
ports SGMII, 1000BASE-X and 100BASE-FX. It can be
configured to act as the fifth or sixth port on the device.
The PHY units in the device support the latest 802.3az
Energy Efficient Ethernet (EEE) standard. They are
designed with Marvell
®
cutting-edge mixed-signal pro-
cessing technology for digital implementation of adaptive
equalization and clock data recovery. The device also
integrates MDI interface termination resistors into the
PHYs. This resistor integration facilitates board layout
and reduces board cost by reducing the number of exter-
nal components. Both the PHY and MAC units in the
devices comply fully with the applicable sections of IEEE
802.3, IEEE 802.3u, and IEEE 802.3x standards.
The PHYs also include an integrated Advanced Virtual
Cable Tester
®
(VCT™) enabling fault detection and
advanced cable performance monitoring.
The 88E6172/88E6176 also supports Wake-on-LAN and
Wake on Frame event detection allowing an attached
CPU to enter sleep mode and enabling even greater
system power savings.
Up to 12 LEDs can be directly driven by the device,
which supports both single and dual color LEDs. The
combining of multiple ports Link/Activity LED into a
single LED is also supported.
The devices many operating modes can be configured
using SMI (serial management interface - MDC/MDIO).
The devices also support a standalone QoS mode or
configuration via a low cost serial EEPROM.
The devices are designed for cost-sensitive Gigabit
Ethernet switch systems that require Quality of Service,
Trunking, Stacking, and/or Spanning Tree.

Link Street
®
88E6172/88E6176 Datasheet
Low Power 7 Port Gigabit Switch with Energy Efficient Ethernet (EEE)
Doc. No. MV-S107228-00 Rev. -- CONFIDENTIAL Copyright © 2013 Marvell
Page 4 Document Classification: Proprietary Information August 20, 2013, Draft
Not Approved by Document Control. For Review Only.
Highlighted Features
• Supports 802.3az Energy Efficient Ethernet
• Wire speed performance with Maximum Frame size
up to 10K Bytes
• ‘Best-in-Class’ per port TCP/IP Ingress Rate
Limiting along with independent Storm Prevention
- 5 Ingress Rate Limiting buckets per port,
supporting Rate-based and Priority-based rate
limiting
- Non-Rate Limited frames based on SA or DA
• Per port, programmable MAC hardware address
learn limiting
• Wake-on-LAN and Wake of Frame Event Detection
• Layer 2 Policy Control List (PCL) enables drop,
trap, or mirroring based on SA, DA, VID, Ethertype,
VBAS, PPPoE, UDP, and DHCP Option 82
• Remote Management capabilities allow device
configuration and readback via Ethernet frames
• Per port, programmable MAC hardware address
learn limiting
• Quality of Service support with four traffic classes
• QoS determined by Port, IEEE 802.1p tagged
frames, IPv4’s Type of Service (TOS) &
Differentiated Services (DS), IPv6’s Traffic Class
802.1Q VID, Destination MAC address, or Source
MAC address
• DSCP (layer 3) to frame priority (layer 2) marking
• Frame priority overrides based on DA, SA, VID,
Ethertype, BC, IP, PPPoE, ARP, or Snoop
• Queue priority overrides based on DA, SA, VID,
Ethertype, BC, IP, PPPoE, ARP, or Snoop
• Strict, Weighted, or mixed mode QoS selectable per
port
• Globally Programmable QoS weighting via a
128-entry table
• 802.1Q VLAN support for the full 4,096 VLAN IDs
• Supports multiple provider ports within a single chip
via a programmable Ethertype per port
• Enhanced 802.1s Per VLAN Spanning Tree
supporting up to 64 spanning tree instances
• Single Link/Activity LED programmable across
multiple ports
- Single and Dual color LED support for Link,
Speed, Duplex Mode, Collision, and Tx/Rx
Activities
Features
• Single 3.3V supply
• Marvell
®
Header for increased Routing
performance
• Shared 1 Mbit on-chip memory-based switch fabric
with true non-blocking switching performance
• High performance lookup engine with support for up
to 8K unicast or multicast MAC address entries with
automatic learning and aging
• MAC SA based 802.1X authentication
• Port Trunking and Port Monitoring/Mirroring
• Egress tagging/untagging selectable per port or by
802.1Q VLAN ID
• Port based VLANs supported in any combination
across multiple chips
• Port States & BPDU handling for Spanning Tree
• 28 32-bit and 2 64-bit RMON Counters per port
• Egress Rate shaping on all ports
• Integrated Gigabit SERDES supporting SGMII,
1000BASE-X, and 100BASE-FX (8E6176 device
only)
• Supports Media Detect mode for copper and fiber
support when paired with Port 4’s PHY (88E6176
device only)
• Ports 5 and 6 support RGMII/MII/RMII interfaces.
Additionally, Port 6 also supports a GMII interface
• Integrated with five independent Auto-Crossover
Ethernet transceivers fully compliant with the
applicable sections of IEEE802.3 and IEEE802.3u
- Integrated MDI interface termination resistors
- Integrated Advanced Virtual Cable Tester®
(VCT™) cable diagnostic feature
• Requires a low-cost 25 MHz XTAL clock source
• Supports 4-Wire 93C56/93C66 or 2-Wire
24C01/24C02/24C04 EEPROMs
- Able to program attached EEPROMs and save
configurations
• 14 x 14mm 128-pin TQFP package
• Low power dissipation P
AVE
= less than 2W
• Available in Commercial grade temperature
specification
• 88E6176 device is available in Industrial grade
temperature specification
Applications
• Gigabit Ethernet broadband router with four
1000BASE-TX LAN ports and one 1000BASE-TX
or 1000BASE-X WAN port
• 5 port Gigabit Ethernet Switch

Overview
Applications
Copyright © 2013 Marvell CONFIDENTIAL Doc. No. MV-S107228-00 Rev. --
August 20, 2013, Draft Document Classification: Proprietary Information Page 5
Not Approved by Document Control. For Review Only.
Figure 1: 88E6172/88E6176 Top Level Block Diagram
Frame
Processing
& Limiting
Frame
Processing
& Limiting
Frame
Processing
& Limiting
Frame
Processing
& Limiting
Time Slot Port Controller
Queue Controller with Four Traffic Classes
RESETn
XTAL_IN
MAC or PHY Mode
GMII/RGMII/RMII/MII
Interface
XTAL_OUT
Frame
Processing
& Limiting
Frame
Processing
& Limiting
Frame
Processing
& Limiting
P0_MDI3
1 Mbit Embedded Switch Fabric
Memory
8,192 Entry
Unicast & Multicast
MAC Address Table
4,096 Entry
802.1Q
VLAN
Table
2 16-bit, 29 32-bit and
2 64-bit RMON
Counters per Port
Lookup Engine
PHY Polling Unit
& Register I/F
MDC_PHY
MDIO_PHY
P0_MDI2
P0_MDI1
P0_MDI0
P1_MDI3
P1_MDI2
P1_MDI1
P1_MDI0
P2_MDI3
P2_MDI2
P2_MDI1
P2_MDI0
Port 3's
GMAC
Port 4's
GMAC
Port 5's
GMAC
Port 6's
GMAC
Port 1's
GMAC
Port 2's
GMAC
Port 0's
GMAC
10/100/1000
Copper EEE PHY
10/100/1000
Copper EEE PHY
10/100/1000
Copper EEE PHY
P3_MDI3
P3_MDI2
P3_MDI1
P4_MDI3
P4_MDI2
P4_MDI1
P4_MDI0
10/100/1000
Copper EEE PHY
10/100/1000
Copper EEE PHY
P3_MDI0
MAC or PHY Mode
RGMII/RMII/MII
Interface
RMU
Frame
Buffer
Remote
Management Unit
Switch Registers
Register Loader
CPU/Reg
Interface
MDC_CPU
MDIO_CPU
INTn
EEPROM
I/F
& LED
Drivers
R[2:0]_LED
EE_DOUT/C3_LED
EE_CS/C2_LED
EE_DIN/C0_LED
EE_CLK/C1_LED
S_RX
S_TX
100/1000
Fiber
SERDES
64 Entry
802.1s per
VLAN Port
States
Voltage Regulators
VDD18_SENS
VDD18
VDD10_OUT
CTRL18
VDD33
(88E6176 device only)
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