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This document describes how to use the demonstration firmware for the DMX-512 communication protocol receiver. The USART (universal synchronous asynchronous receiver transmitter) module of the STM32F103Zx (ARM 32-bit Cortex™-M3) microcontroller unit receives the data from the DMX-512 controller via an RS-485 transceiver. This receiver is compatible with the latest DMX-512 protocol, and can also be used with any DMX-512 controller having a “NULL” start code.
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March 2010 Doc ID 16257 Rev 2 1/21
UM0791
User manual
Demonstration firmware for the DMX-512 communication
protocol receiver based on the STM32F103Zx
Introduction
This document describes how to use the demonstration firmware for the DMX-512
communication protocol receiver. The USART (universal synchronous asynchronous
receiver transmitter) module of the STM32F103Zx (ARM 32-bit Cortex™-M3)
microcontroller unit receives the data from the DMX-512 controller via an RS-485
transceiver. This receiver is compatible with the latest DMX-512 protocol, and can also be
used with any DMX-512 controller having a “NULL” start code.
This document provides:
■ an overview of the complete solution.
■ a description and flowcharts of the STM32 demonstration firmware.
■ schematics and layouts.
www.st.com
Contents UM0791
2/21 Doc ID 16257 Rev 2
Contents
1 DMX-512 receiver format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Packet format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Timing values for DMX-512-A receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 DMX-512 receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 System overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 DMX-512 receiver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 RS-485 transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 MCU block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3 Demonstration firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 dmx_init.c file description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.1 Timer2_Initialise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.2 USART1_Intialise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.3 Timer3_PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1.4 PWM_Update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 main.c file description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.1 RCC_Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.2 NVIC_Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.2.3 GPIO_Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 Timer2 interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 USART1 interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4 Firmware architecture overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Firmware flowcharts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1 Main routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2 Timer2 interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2.1 Channel 2 rising edge interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2.2 Channel 1 falling edge interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.3 USART1 interrupt routine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 Key features/specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
List of figures UM0791
4/21 Doc ID 16257 Rev 2
List of figures
Figure 1. Timing diagram for DMX-512 packet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Typical DMX-512 receiver system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Typical DMX-512 receiver circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Block diagram of single DMX-512 receiver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5. Front view of RS-485 transceiver board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 6. J1 pin diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 7. J2 pin diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 8. MCU block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 9. Demonstration firmware architecture overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 10. Main routine flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Timer2 rising edge interrupt flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 12. Timer2 falling edge interrupt flow chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 13. USART1 interrupt flow chart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 14. Schematic of RS-485 transceiver board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Layout of RS-485 transceiver board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
UM0791 DMX-512 receiver format
Doc ID 16257 Rev 2 5/21
1 DMX-512 receiver format
1.1 Packet format
The DMX-512 slots are transmitted sequentially in an asynchronous serial format, beginning
with slot 0 and ending with the last implemented slot, up to slot 512 (a maximum total of 513
slots). Before the first data slot is transmitted, a reset sequence is transmitted, consisting of
a BREAK, a MARK AFTER BREAK and a START code. Valid DMX-512 data slot values
under a NULL START code range from 0 to 255 decimal.
Figure 1. Timing diagram for DMX-512 packet
The following points refer to the numbers shown in Figure 1.
1. SPACE for BREAK
2. MARK AFTER BREAK
3. Slot time
4. START time
5. LEAST SIGNIFICANT data bit
6. MOST SIGNIFICANT data bit
7. STOP bit
8. STOP bit
9. MARK TIME BETWEEN SLOTS
10. MARK BEFORE BREAK
11. BREAK to BREAK time
12. RESET sequence
13. DMX-512 packet
14. START CODE (slot 0, data)
15. SLOT 1, data
16. SLOT n, data (max 512)
!-V
剩余20页未读,继续阅读
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