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Copyright © 2015, 2018 Arm. All rights reserved.
ARM DUI 0646C (ID121118)
Arm
®
Cortex
®
-M7 Devices
Generic User Guide
ARM DUI 0646C Copyright © 2015, 2018 Arm. All rights reserved. ii
ID121118 Non-Confidential
Arm Cortex-M7 Devices
Generic User Guide
Copyright © 2015, 2018 Arm. All rights reserved.
Release Information
The following changes have been made to this book.
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Copyright © 2015, 2018 Arm Limited or its affiliates. All rights reserved.
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Change history
Date Issue Confidentiality Change
19 March 2015 A Non-Confidential First release for r1p0
07 July 2015 B Non-Confidential First release for r1p1
15 November 2018 C Non-Confidential First release for r1p2
ARM DUI 0646C Copyright © 2015, 2018 Arm. All rights reserved. iii
ID121118 Non-Confidential
Confidentiality Status
This document is Non-Confidential. The right to use, copy and disclose this document may be subject to license
restrictions in accordance with the terms of the agreement entered into by ARM and the party that ARM delivered this
document to.
Product Status
The information in this document is final, that is for a developed product.
Web Address
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ARM DUI 0646C Copyright © 2015, 2018 Arm. All rights reserved. iv
ID121118 Non-Confidential
Contents
Arm Cortex-M7 Devices Generic User Guide
Preface
About this book .......................................................................................................... vii
Feedback ..................................................................................................................... x
Chapter 1 Introduction
1.1 About the Cortex-M7 processor and core peripherals ............................................. 1-2
Chapter 2 The Cortex-M7 Processor
2.1 Programmers model ................................................................................................ 2-2
2.2 Memory model ....................................................................................................... 2-12
2.3 Exception model .................................................................................................... 2-19
2.4 Fault handling ........................................................................................................ 2-27
2.5 Power management ............................................................................................... 2-31
Chapter 3 The Cortex-M7 Instruction Set
3.1 Instruction set summary ........................................................................................... 3-2
3.2 CMSIS functions .................................................................................................... 3-12
3.3 About the instruction descriptions .......................................................................... 3-14
3.4 Memory access instructions .................................................................................. 3-24
3.5 General data processing instructions .................................................................... 3-42
3.6 Multiply and divide instructions .............................................................................. 3-82
3.7 Saturating instructions ......................................................................................... 3-104
3.8 Packing and unpacking instructions .................................................................... 3-116
3.9 Bit field instructions .............................................................................................. 3-123
3.10 Branch and control instructions ........................................................................... 3-127
3.11 Floating-point instructions .................................................................................... 3-135
3.12 Miscellaneous instructions ................................................................................... 3-172
Contents
ARM DUI 0646C Copyright © 2015, 2018 Arm. All rights reserved. v
ID121118 Non-Confidential
Chapter 4 Cortex-M7 Peripherals
4.1 About the Cortex-M7 peripherals ............................................................................. 4-2
4.2 Nested Vectored Interrupt Controller ....................................................................... 4-3
4.3 System control block .............................................................................................. 4-11
4.4 System timer, SysTick ........................................................................................... 4-33
4.5 Processor features ................................................................................................. 4-37
4.6 Optional Memory Protection Unit ........................................................................... 4-43
4.7 Floating Point Unit ................................................................................................. 4-55
4.8 Cache maintenance operations ............................................................................. 4-61
4.9 Access control ....................................................................................................... 4-66
Appendix A Cortex-M7 Options
A.1 Cortex-M7 processor options ................................................................................... A-2
Appendix B Revisions
Glossary
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