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SiI9136-3 Programmer's Reference
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SiI9136-3 Programmer's Reference Transmitter Programming Interface (TPI) Programmer’s Reference Silicon Image
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Programmer’s Reference
Transmitter Programming Interface (TPI)
Programmer‘s Reference
Document # SiI-PR-1032-A

Transmitter Programming Interface (TPI)
Programmer’s Reference
Silicon Image, Inc.
ii © 2009-2011 Silicon Image, Inc. All rights reserved. SiI-PR-1032-A
CONFIDENTIAL
June 2011
Copyright Notice
Copyright © 2009-2011 Silicon Image, Inc. All rights reserved. The contents of these materials contain proprietary and
confidential information (including trade secrets, copyright, and other Intellectual Property interests) of Silicon Image,
Inc. or its affiliates. All rights are reserved and contents, (in whole or in part) may not be reproduced, downloaded,
disseminated, published, or transferred in any form or by any means, except with the prior written permission of Silicon
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Further Information
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© 2009-2011 Silicon Image, Inc. All rights reserved.

Transmitter Programming Interface (TPI)
Programmer’s Reference
Silicon Image, Inc.
SiI-PR-1032-A © 2009-2011 Silicon Image, Inc. All rights reserved. iii
CONFIDENTIAL
Revision History
Revision
Date
Comment
0.85
5-26-11
Clarify the enable of DEVICE COUNT = 0 check for 9022A / 9024A.
Clarify the enable of Ri check usage for 9022A / 9024A using Embedded
Sync mode.
Fix TPI 0x08[4] Edge select definition for 9136 / 9136-3 / 9334.
Add a few more clarifications for registers available at 0x62–0x6D
depend on the setting of TPI 0x60[7].
0.84
11-15-10
Clarify programming of Interrupt pin for push-pull in TPI mode.
0.83
11-12-10
Added programming of Interrupt pin for push-pull in Appendix A.
0.82
10-01-10
Appendix D: Clarify x.v.ColorSpace and add support for 4K x 2K modes.
0.81
09-30-10
Remove reference to invalid I2C Slave Address 0x92 from SiI 9232/9236.
Remove reference to products SiI 9222/9226.
Remove reference to obsolete functions of SiI 9232 / 9236.
0.80
08-26-10
Fix Indexed Register Page Values.
Clarify TPI 0x40 Software Reset effects on CEC and appropriate
workaround.
Note for the SiI9136-3/9136/9334 for TPI 0x08 (Input Clock and the TMDS
Link Clock tolerances).
Note for the SiI9136-3 for TPI 0x0A (Output Color Depth Clock tolerances).
0.79
07-01-10
Complete update of Appendix B
0.78
06-22-10
Updates for SiI9136-3
0.77
04-09-10
Update wakeup support in D3 Cold and Hot for SiI 9022A/ SiI 9024A.
Clarify RESET value.
Removed comment about 3D modes and DE generator.
0.76
03-08-10
Revised Programmer‘s Reference release.
Updates for SiI9136/9334:
- Added workaround for HBR audio (added V bit programming)
- Revised Ri Read section
- Fixed Video Black Mode Register access
- Added video output programming section
- Fixes for KSV Forward
- Fixes for range control
0.75
02-04-10
Revised Programmer‘s Reference release.
Updates for SiI9136/9334:
- Update SiI9136/9334 Revision ID
- Add Hot Plug Delay De-bounce
- Update explicit Sync DE Generator values for H_RES, DE_CNT, DE_LIN
- Indicate Bit swap and YC Channel swap features function without enable
- Add Ri Read, Bcaps and Bstatus
- Add VSYNC and HSYNC polarity to Embedded Sync Extraction Registers
- Indicate re-write of TPI 0x60 after setting AVI InfoFrame not necessary
- Remove 2x clocking setting from 16bit deep color setting
- Video Black Mode Levels provided for Black Mode of Video Input Mode
- When TPI 0x1A transitions from DVI to HDMI, then TPI 0x08[1:0] is no
longer cleared
- Remove manual configuration for 192kHz S/PDIF with 480i video
- Muting works in DVI mode
- Deep Color modes require GCP to send deep color information, this must
be enabled by software
- Add TPI Soft Reset Register
- Removed incorrect restrictions on H_Res for 3D modes
- Updated HEAC information with latest recommendations
0.74
09-21-09
Revised Programmer‘s Reference release.
Changes:
- Removed incorrect restriction on H_RES for 3D modes
- Updated HEAC information with latest recommendations
- Removed SiI9230/9234 Tx references (moved to separate document)
- Added notes of interest to describe details of HDCP operation.

Transmitter Programming Interface (TPI)
Programmer’s Reference
Silicon Image, Inc.
iv © 2009-2011 Silicon Image, Inc. All rights reserved. SiI-PR-1032-A
CONFIDENTIAL
0.73
08-18-09
Revised Programmer‘s Reference release.
Changes:
- Corrected description of TPI 0x1F (I
2
S register)
- Clarified description of authentication success/fail status
- Added supported 3D mode descriptions
- Clarified Access requirements in register descriptions
- Added clarification notes for SiI9136/9334 Tx operation
- Modified DE_ADJ# setting recommendation
0.72
06-15-09
Revised Programmer‘s Reference release.
Changes:
- Added ARC and HEAC sections.
- Added significant information and corrections to most sections.
0.71
02-27-09
Revised Programmer‘s Reference release.
Changes:
- Removed ―Advance‖ from title, because this document is mature for most
products represented.
- Added additional information for new and upcoming products
0.70
11-18-08
Initial Advance Programmer‘s Reference release.

Transmitter Programming Interface (TPI)
Programmer’s Reference
Silicon Image, Inc.
SiI-PR-1032-A © 2009-2011 Silicon Image, Inc. All rights reserved. v
CONFIDENTIAL
Table of Contents
Overview ......................................................................................................................................................................... 1
Register Group Summary............................................................................................................................................. 2
Transmitter Programming Interface (TPI) ............................................................................................................... 2
Internal (Indexed) Registers ..................................................................................................................................... 3
SiI9022 and SiI9024 Tx ........................................................................................................................................... 3
SiI9022A and SiI9024A Tx ..................................................................................................................................... 3
SiI9136-3 TX, SiI9136 Tx and SiI9334 Tx ............................................................................................................. 5
I
2
C Requirements ......................................................................................................................................................... 6
Summary of Host Software Tasks .................................................................................................................................... 7
Detailed Sequences ...................................................................................................................................................... 8
Initialization ............................................................................................................................................................. 8
Servicing a Hot Plug Event ...................................................................................................................................... 9
Changing Video Modes ......................................................................................................................................... 10
HDCP Authentication and Encryption ................................................................................................................... 10
HDCP Revocation Check ...................................................................................................................................... 10
General Programming Registers .................................................................................................................................... 11
Important Notes ......................................................................................................................................................... 11
Identification .............................................................................................................................................................. 12
Video Configuration .................................................................................................................................................. 13
Video Mode ........................................................................................................................................................... 13
Output color space control (SiI9334, SiI9136 and SiI9136-3) .................................................................................. 18
Input Setup Operations .............................................................................................................................................. 19
DE Generator Register Set ......................................................................................................................................... 22
InfoFrame Data ...................................................................................................................................................... 26
Using x.v.Color ...................................................................................................................................................... 28
Extended Colorimetry Standards ........................................................................................................................... 28
System Control ...................................................................................................................................................... 28
Audio Configuration .................................................................................................................................................. 30
Configuring Audio using S/PDIF ........................................................................................................................... 30
Configuring Audio using I
2
S .................................................................................................................................. 32
Configuring Audio for DSD Format ...................................................................................................................... 35
Configuring Audio for HBR Format ...................................................................................................................... 36
Interrupt Service ............................................................................................................................................................ 37
Interrupt Enable Register ........................................................................................................................................... 37
Interrupt Status Register ............................................................................................................................................ 37
Interrupt Operation .................................................................................................................................................... 39
TPI System Reset And Control ...................................................................................................................................... 40
Power State Control and Hot Plug Management ........................................................................................................... 41
Transmitter Power State Register ............................................................................................................................... 41
Hot vs Cold Wakeup Modes .................................................................................................................................. 42
Hot Plug Management ............................................................................................................................................... 43
Hot Plug Service Loop........................................................................................................................................... 43
Operating Sequences ............................................................................................................................................. 43
HDCP Implementation ................................................................................................................................................... 45
Control for HDCP ...................................................................................................................................................... 46
HDCP Operation .................................................................................................................................................... 46
HDCP Data Structure ............................................................................................................................................. 47
Auxiliary HDCP Registers ..................................................................................................................................... 50
Appendix A – SiI9020 Tx Compatible Mode ................................................................................................................ 53
SiI9020-9022-9022A Transmitter Mode Differences ................................................................................................ 53
PLL Settings .......................................................................................................................................................... 53
DDC Bus Request/Grant ........................................................................................................................................ 54
Video Black Mode ................................................................................................................................................. 55
Power-Down Register ............................................................................................................................................ 55
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