没有合适的资源?快使用搜索试试~ 我知道了~
首页s32v234 Reference manual
资源详情
资源评论
资源推荐
© Freescale Semiconductor, Inc., 2012. All rights reserved.
Freescale Semiconductor
S32V234RM
Rev. 1.2, 10/2015
This is the S32V234 Reference Manual set consisting of the following files:
• S32V234 Reference Manual Addendum, Rev 1.2
• S32V234 Reference Manual, Rev 1.1
S32V234 Reference Manual
S32V234 Reference Manual
Addendum
Document Number: S32V234RMAD
Rev. 1.2 10/2015
Preliminary
Freescale Confidential Proprietary - Non-Disclosure Agreement required
S32V234 Reference Manual Addendum, Rev. 1.2 10/2015
2
Preliminary
Freescale Semiconductor, Inc.
Freescale Confidential Proprietary - Non-Disclosure Agreement required
Contents
Section number Title Page
Chapter 1
Overview
1.1 Overview.........................................................................................................................................................................9
Chapter 2
Recommended pad settings for DDR
2.1 Recommended pad settings for DDR............................................................................................................................. 11
Chapter 3
Video-In-Lite (VIULite)
3.1 VIU Lite..........................................................................................................................................................................13
Chapter 4
OTFAD
4.1 OTFAD........................................................................................................................................................................... 15
Chapter 5
Self-Test Control Unit (STCU2)
5.1 Chip-specific Self Test Control Unit (STCU2) information...........................................................................................17
5.1.1 Self Test Overview.............................................................................................................................................17
5.1.2 STCU2 L/MBIST mapping................................................................................................................................18
5.1.3 Wait Time for Writing to the Online Registers..................................................................................................47
5.1.4 On-Line Reset Generation (only MBIST)......................................................................................................... 47
5.1.5 On-Line Reset Generation (LBIST Enabled).....................................................................................................47
5.1.6 AUTOLOCK_VALUE for Register Write Access via STCU2_SKC...............................................................48
5.1.7 STCU Registers Reset Values............................................................................................................................48
5.2 Introduction.....................................................................................................................................................................49
5.3 Main features.................................................................................................................................................................. 49
5.4 Block diagram.................................................................................................................................................................50
5.5 IPS bus interface............................................................................................................................................................. 52
5.6 Functional description.....................................................................................................................................................53
5.6.1 FSM description.................................................................................................................................................53
S32V234 Reference Manual Addendum, Rev. 1.2 10/2015
Freescale Semiconductor, Inc.
Preliminary
3
Freescale Confidential Proprietary - Non-Disclosure Agreement required
Section number Title Page
5.6.2 Reset management............................................................................................................................................. 53
5.6.3 Built-in self-test scheduling............................................................................................................................... 54
5.6.4 ABORT management.........................................................................................................................................54
5.6.5 Interrupt interface...............................................................................................................................................54
5.6.6 FCCU interface.................................................................................................................................................. 55
5.6.7 Watchdogs..........................................................................................................................................................55
5.7 Register description........................................................................................................................................................ 56
5.7.1 STCU2 Run Software Register (STCU2_RUNSW)..........................................................................................68
5.7.2 STCU2 SK Code Register (STCU2_SKC)........................................................................................................69
5.7.3 STCU2 Configuration Register (STCU2_CFG)................................................................................................70
5.7.4 STCU2 Watchdog Register Granularity (STCU2_WDG).................................................................................72
5.7.5 STCU2 Interrupt Flag Register (STCU2_INT_FLG)........................................................................................74
5.7.6 STCU2 Error Register (STCU2_ERR_STAT)..................................................................................................75
5.7.7 STCU2 Error FM Register (STCU2_ERR_FM)............................................................................................... 77
5.7.8 STCU2 On-Line LBIST Status Register 0 (STCU2_LBSSW0)....................................................................... 78
5.7.9 STCU2 On-Line LBIST End Flag Register 0 (STCU2_LBESW0).................................................................. 82
5.7.10 STCU2 LBIST Unrecoverable FM Register 0 (STCU2_LBUFM0).................................................................85
5.7.11 STCU2 On-Line MBIST Status Register 0 (STCU2_MBSSW0)..................................................................... 88
5.7.12 STCU2 On-Line MBIST Status Register 1 (STCU2_MBSSW1)..................................................................... 92
5.7.13 STCU2 On-Line MBIST Status High Register 2 (STCU2_MBSSW2)............................................................ 95
5.7.14 STCU2 On-Line MBIST End Flag Register 0 (STCU2_MBESW0)................................................................ 97
5.7.15 STCU2 On-Line MBIST End Flag Register 1 (STCU2_MBESW1)................................................................ 101
5.7.16 STCU2 On-Line MBIST End Flag Register 2 (STCU2_MBESW2)................................................................ 105
5.7.17 STCU2 MBIST Unrecoverable FM Register 0 (STCU2_MBUFM0)...............................................................107
5.7.18 STCU2 MBIST Unrecoverable FM Register 1 (STCU2_MBUFM1)...............................................................111
5.7.19 STCU2 MBIST Unrecoverable FM Register 2 (STCU2_MBUFM2)...............................................................115
5.7.20
STCU2 LBIST Control Register (STCU2_LB_CTRLn)...................................................................................117
5.7.21
STCU2 LBIST PC Stop Register (STCU2_LB_PCSn).....................................................................................119
5.7.22
STCU2 On-Line LBIST MISR Expected Low Register (STCU2_LB_MISRELSWn)....................................120
S32V234 Reference Manual Addendum, Rev. 1.2 10/2015
4
Preliminary
Freescale Semiconductor, Inc.
Freescale Confidential Proprietary - Non-Disclosure Agreement required
剩余4932页未读,继续阅读
weixin_41540689
- 粉丝: 0
- 资源: 1
上传资源 快速赚钱
- 我的内容管理 收起
- 我的资源 快来上传第一个资源
- 我的收益 登录查看自己的收益
- 我的积分 登录查看自己的积分
- 我的C币 登录后查看C币余额
- 我的收藏
- 我的下载
- 下载帮助
会员权益专享
最新资源
- c++校园超市商品信息管理系统课程设计说明书(含源代码) (2).pdf
- 建筑供配电系统相关课件.pptx
- 企业管理规章制度及管理模式.doc
- vb打开摄像头.doc
- 云计算-可信计算中认证协议改进方案.pdf
- [详细完整版]单片机编程4.ppt
- c语言常用算法.pdf
- c++经典程序代码大全.pdf
- 单片机数字时钟资料.doc
- 11项目管理前沿1.0.pptx
- 基于ssm的“魅力”繁峙宣传网站的设计与实现论文.doc
- 智慧交通综合解决方案.pptx
- 建筑防潮设计-PowerPointPresentati.pptx
- SPC统计过程控制程序.pptx
- SPC统计方法基础知识.pptx
- MW全能培训汽轮机调节保安系统PPT教学课件.pptx
资源上传下载、课程学习等过程中有任何疑问或建议,欢迎提出宝贵意见哦~我们会及时处理!
点击此处反馈
安全验证
文档复制为VIP权益,开通VIP直接复制
信息提交成功
评论0