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CSR8675 datasheet

CSR8675 BGA有线和消费音频平台无线应用程序集成了一个超低功耗DSP和应用处理器与嵌入式flash内存,高性能立体声编解码器,电源管理子系统、LED和液晶驱动程序和在SoC集成电路电容式触觉传感器的输入。
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Features
BlueCore
®
CSR8675 BGA
■
Bluetooth
®
v4.1 specification fully qualified
■
Radio includes integrated balun
■
80 MHz RISC MCU and 120 MHz Kalimba DSP
■
Up to 120 MIPS DSP for intensive digital signal
processing algorithms
■
24-bit audio
■
16 Mb internal flash; optional support for 64 Mb of
external SPI flash
■
Stereo codec with 2 channels of ADC and up to 6
microphone inputs (includes bias generation and
digital microphone support)
■
Audio interfaces:
■
2 x I²S/PCM
■
1 x SPDIF (independent of I²S/PCM ports)
■
Serial interfaces: UART, USB 2.0 full-speed, I²C
and SPI
■
Integrated dual switch-mode regulators, linear
regulators and battery charger
■
3 hardware LED controllers (for RGB) and ability to
drive LCD segment display directly
■
Support for up to 6 capacitive touch sensor inputs
■
6.5 x 6.5 x 1 mm, 0.5 mm pitch 112‑ball VFBGA
■
CSR8675 BGA application boards back compatible
with CSR8670 BGA
■
Green (RoHS compliant and no antimony or
halogenated flame retardants)
Bluetooth Smart Ready
Low-power Solution for
DSP Intensive Audio Applications
Production Information
CSR8675B
Issue 5
General Description
CSR8675 BGA consumer audio platform for wired and
wireless applications integrates an ultra‑low‑power
DSP and application processor with embedded flash
memory, a high-performance stereo codec, a power
management subsystem, LED and LCD drivers and
capacitive touch sensor inputs in a SoC IC.
2.4 GHz
Radio
+
Balun
I/O
BT_RF RAM
Baseband
MCU
Kalimba
DSP
Flash
XTAL
Serial Flash
Exter nal
Memory
UART/USB
PIO
Audio In / Out
PCM/I
2
S
SPI /I
2
C
LED /PIO
Audio
Interface
Capacitive
Sense
Clock
Gener ation
SPDIF
PCM/I
2
S
Applications
■
High-end wired/wireless stereo headphones
■
High-end wired/wireless stereo headsets
■
High-end wired/wireless active headsets
■
Wireless stereo speakers
■
Low-end docking stations and soundbars
■
Gaming headsets
The dual-core architecture with flash memory enables
manufacturers to easily differentiate their products with
new features without extending development cycles.
The enhanced Kalimba DSP coprocessor with up to
120 MIPS supports more digital signal processing
requirements in stereo headphones, headsets, gaming
headsets and soundbars.
The audio codec supports 2 ADC channels, up to 6
microphone inputs, stereo output and a variety of audio
standards.
CSR's popular BlueCore
®
CSR8670
™
and
BlueCore
®
5‑Multimedia platforms are
software‑portable to the CSR8675 BGA, with easy
migration of a broad range of solutions from CSR's
eXtension partners. This enables rapid time-to-market
deployment for a broad range of consumer electronic
products.
Production Information
© Cambridge Silicon Radio Limited 2013-2014
Confidential Information - This Material is Subject to CSR's Non-Disclosure Agreement
Page 1 of 112
CS-232426-DSP5
www.csr.com
CSR8675 BGA
Data Sheet
Prepared for weiqiang ye - qcymall.com - Monday, November 24, 2014

Ordering Information
Device
Package
Order Number
Type Size
Shipment
Method
CSR8675
VFBGA‑112‑ball
(Pb free)
6.5 x 6.5 x 1 mm
0.5 mm pitch
Tape and reel CSR8675B‑IBBH‑R
Note:
Minimum order quantity is 2kpcs taped and reeled.
Supply chain: CSR's manufacturing policy is to multisource volume products. For further details, contact your local
sales account manager or representative.
Contacts
General information
Information on this product
Customer support for this product
Details of compliance and standards
Help with this document
www.csr.com
sales@csr.com
www.csrsupport.com
product.compliance@csr.com
comments@csr.com
CSR8675 Development Kit Ordering Information
Description Order Number
CSR8675 BGA Audio Development Kit DK-CSR8675-10197-1A
CSR8675 BGA Development Kit (Board Only) DB-CSR8675-10200-1A
Production Information
© Cambridge Silicon Radio Limited 2013-2014
Confidential Information - This Material is Subject to CSR's Non-Disclosure Agreement
Page 2 of 112
CS-232426-DSP5
www.csr.com
CSR8675 BGA
Data Sheet
Prepared for weiqiang ye - qcymall.com - Monday, November 24, 2014

Device Details
Bluetooth low energy
■ Dual‑mode Bluetooth low energy radio
■ Support for Bluetooth basic rate / EDR and low energy
connections
■ 3 Bluetooth low energy connections at the same time as
basic rate A2DP
Bluetooth Radio
■ On‑chip balun (50 Ω impedance in TX and RX modes)
■ No external trimming is required in production
■ Bluetooth v4.1 specification software/hardware
Bluetooth Transmitter
■ Typical RF transmit power
■ Basic rate 10 dBm
■ EDR -1 dB (relative power)
■ Bluetooth low energy 9 dBm
■ 6‑bit DAC level control
■ Class 1, Class 2 and Class 3 support without the need for
an external power amplifier or TX/RX switch
Bluetooth Receiver
■ Typical RF receiver sensitivity:
■ Basic rate -90 dBm
■ EDR -92 dBm
■ Bluetooth low energy -93 dBm
■ Integrated channel filters
■ Digital demodulator for improved sensitivity and co‑channel
rejection
■ Real‑time digitised RSSI available to application
■ Fast AGC for enhanced dynamic range
■ Channel classification for AFH
Bluetooth Synthesiser
■ Fully integrated synthesiser requires no external VCO,
varactor diode, resonator or loop filter
■ Compatible with crystals 19.2 MHz to 32 MHz or an external
clock 19.2 MHz to 40 MHz (default 26 MHz)
Kalimba DSP
■ Enhanced Kalimba 5 DSP coprocessor
■ 120 MHz clock, up to 120 MIPS performance
■ 24‑bit fixed-point core
■ Single‑cycle MAC:
■ 24 x 24‑bit multiply
■ 56‑bit accumulate
■ Improved architecture and instructions for better
performance over CSR8670 BGA
■ 32‑bit instruction word
■ Dual 24‑bit data memory
■ 12 K x 32‑bit program RAM including 1 K instruction cache
for executing out of internal flash
■ 2‑bank data RAM:
■ DM1 32 K x 24‑bit
■ DM2 32 K x 24‑bit
Baseband and Software
■ 16 Mb internal flash
■ Memory protection unit supporting accelerated VM
■ 56 KB internal RAM, enables full‑speed data transfer, mixed
voice/data and full piconet support
■ Logic for forward error correction, header error control,
access code correlation, CRC, demodulation, encryption bit
stream generation, whitening and transmit pulse shaping
■ Transcoders for A‑law, µ‑law and linear voice via PCM and
A‑law, µ‑law and CVSD voice over air
Audio Interfaces
■ Audio codec with 2 high‑quality dedicated ADCs
■ 24-bit audio processing support
■ 2 microphone bias generators and up to 2 analogue
microphone inputs
■ Up to 6 digital microphone inputs (MEMS)
■ G.722 compatible, includes improved digital IIR filter path
for stop‑band attenuation required for G.722 compliance
■ Enhanced side‑tone gain control
■ Supported sample rates of 8, 11.025, 16, 22.05, 32, 44.1,
48, 96 kHz and 192kHz (DAC only)
Physical Interfaces
■ UART interface
■ USB 2.0 interface (full‑speed)
■ Master and slave bit‑serialiser (I²C and SPI)
■ Up to 32 PIOs (includes 12 general purpose PIOs and
unused digital interfaces also available as PIOs)
■ SPI debug and programming interface with read access
disable locking
■ 2 x PCM/I²S and 1 x SPDIF supported simultaneously
■ Dual/quad external serial flash memory interface
■ 3 LED drivers (includes RGB) with PWM flasher on sleep
clock
■ Support for up to 6 capacitive touch sensor inputs
■ 2 analogue PIOs
Integrated Power Control and Regulation
■ 2 high‑efficiency switch‑mode regulators with 1.8 V and
1.35 V outputs from battery supply
■ 3.3 V USB pad supply linear regulator
■ Low‑voltage linear regulator for internal digital supply
■ Low‑voltage linear regulator for internal analogue supply
with 1.35 V output
■ Power‑on‑reset detects low supply voltage
■ Power management includes digital shutdown and wake‑up
commands with low‑power crystal drive for ultra‑low power
Park/Sniff/Hold mode
Battery Charger
■ Lithium ion / Lithium polymer battery charger with instant‑on
■ Fast charging support up to 200 mA with no external
components
■ Higher charge currents using external pass device
■ Supports USB BCv1.2 CDP, DCP and SDP charger
detection
■ Charger pre‑calibrated by CSR
■ PSE compliance:
■ Design to JIS‑C 8712/8714 (batteries)
■ Testing based on IEEE 1725
Auxiliary Features
■ Customer application space available
■ Crystal oscillator with built‑in digital trimming
■ Auxiliary ADC and DAC available to applications
Package Option
■ 6.5 x 6.5 x 1 mm, 0.5 mm pitch 112‑ball VFBGA
Production Information
© Cambridge Silicon Radio Limited 2013-2014
Confidential Information - This Material is Subject to CSR's Non-Disclosure Agreement
Page 3 of 112
CS-232426-DSP5
www.csr.com
CSR8675 BGA
Data Sheet
Prepared for weiqiang ye - qcymall.com - Monday, November 24, 2014

Functional Block Diagram
G-TW-0012758.3.2
Memory
Management
Unit
Bluetooth Modem
120 MHz DSP
I
2
C/SPI
Master/
Slave
PIO
SPI
(Debug)
UART
4 Mbps
System
RAM
Serial Quad
I/O
Flash
(SQIF)
Interface
DMA ports
DMA ports
2 x
PCM /
I
2
S
eFlash
SPI_DEBUG Serial Flash/RAM
I
2
C
MIC_LN
UART
80 MHz MCU
SPKR_LN
Audio
Interface
MIC Bias
MIC_BIAS_B
MIC_BIAS_A
USB v2.0
Full-speed
USB
3.3V
MIC Bias
6x
MEMS
MIC
Digit al MI Cs
SPI–Lock
/DFU
Encrypt
VM Accelerator
(MPU )
LCD
Segment
Driver
PMU
Interface
and
BIST
Engine
LED PWM
Control and
Output
PM
DM1
DM2
RGB
Digital Audio
1.35V
Switch-
mode
Regulator
Bypass
LDO
SMP_VBAT
LXL_1V8
Li-ion
Charger
VCHG
SMPS_3V3
1.8V
Switch-
mode
Regulator
LX_1V35
SMPS_1V8_SENSE
VOUT_3V3
Voltage / Temperature
Monitor
BT_RF
CAP_SENSE[0]
Clock
Generation
Analogue
Test
AUX ADC
XTAL AIO[1:0]
Capacitive
Touch
Controller
CAP_SENSE[1]
CAP_SENSE[2]
CAP_SENSE[3]
CAP_SENSE[4]
CAP_SENSE[5]
MIC_LP
MIC_RN
MIC_RP
SPKR_LP
SPKR_RN
SPKR_RP
SENSE SENSE
Bluetooth
Baseband
Bluetooth Radio
and Balun
TX
RX
High-quality ADC
High-quality ADC
High-quality DAC
High-quality DAC
1.35V
Low-voltage
VDD_AUX
Linear
Regulator
1.35V
Low-voltage
VDD_ANA
Linear
Regulator
Low-voltage
VDD_DIG
Linear
Regulator
DMA ports
VDD_AUX
SENSE
VDD_ANA
SENSE
VDD_BT_RADIO
VDD_DIG_EFLASH
SENSE
CHG_EXT
Switch
SMPS_1V35_SENSE
SENSE
VBAT
External
Connection
External
Connection
VDD_AUX_1V8
VREGIN_DIG
SPDIF
PIO
Production Information
© Cambridge Silicon Radio Limited 2013-2014
Confidential Information - This Material is Subject to CSR's Non-Disclosure Agreement
Page 4 of 112
CS-232426-DSP5
www.csr.com
CSR8675 BGA Data Sheet
Prepared for weiqiang ye - qcymall.com - Monday, November 24, 2014

Document History
Revision Date Change Reason
1 27 FEB 13 Original publication of this document.
Issue 1 content set as:
■
Technical Overview material
■
Functional block diagram
■
Package information
■
PIO configuration
■
Example application schematic
■
Green and RoHS information
■
Tape and reel information
2 12 FEB 14 Full-version of Advance Information data sheet created.
3 25 SEP 14 Production Information added.
4 26 SEP 14 Additional Power Consumption information added.
5 08 OCT 14 Integrated Digital IIR Filter information updated.
Production Information
© Cambridge Silicon Radio Limited 2013-2014
Confidential Information - This Material is Subject to CSR's Non-Disclosure Agreement
Page 5 of 112
CS-232426-DSP5
www.csr.com
CSR8675 BGA
Data Sheet
Prepared for weiqiang ye - qcymall.com - Monday, November 24, 2014
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