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RTL8211E-VB-CG

RTL8211E-VL-CG

RTL8211EG-VB-CG

INTEGRATED 10/100/1000M ETHERNET

TRANSCEIVER

DATASHEET

(CONFIDENTIAL: Development Partners Only)

Rev. 1.6

03 April 2012

Track ID: JATR-3375-16

Realtek Semiconductor Corp.

No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan

Tel.: +886-3-578-0211 Fax: +886-3-577-6047

www.realtek.com

RTL8211E/RTL8211EG

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

Track ID: JATR-3375-16 Rev. 1.

transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any

means without the written permission of Realtek Semiconductor Corp.

DISCLAIMER

Realtek provides this document ‘as is’, without warranty of any kind. Realtek may make improvements

and/or changes in this document or in the product described in this document at any time. This document

could include technical inaccuracies or typographical errors.

TRADEMARKS

Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document are

trademarks/registered trademarks of their respective owners.

LICENSE

This product is covered by one or more of the following patents: US5,307,459, US5,434,872, US5,732,094,

US6,570,884, US6,115,776, and US6,327,625.

USING THIS DOCUMENT

This document is intended for the software engineer’s reference and provides detailed programming

information.

Though every effort has been made to ensure that this document is current and accurate, more information

may have become available subsequent to the production of this guide.

REVISION HISTORY

Revision Release Date Summary

1.0 2009/08/31 First release.

1.1 2010/08/13 Added RTL8211EG-CG product data.

1.2 2010/08/16 Corrected minor typing errors.

1.3 2010/12/17 Added RTL8211E-VL-CG model number.

Revised Table 23 BMCR (Basic Mode Control Register, Address 0x00), page 31.

Revised Table 32 GBCR (1000Base-T Control Register, Address 0x09), page 37.

Revised Table 40 INSR (Interrupt Status Register, Address 0x13), page 42.

Revised Table 55 Power Sequence parameter, page 55.

Revised Table 61 MDC/MDIO Management Timing Parameters, page 59.

Added section 10.6.2 MII Transmission Cycle Timing, page 60.

Added section 10.6.3 MII Reception Cycle Timing (RTL8211EG-VB Only), page 60.

Revised Table 64 GMII Timing Parameters, page 62.

Revised ordering numbers (see Table 66 Ordering Information, page 70).

RTL8211E/RTL8211EG

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

iii

Track ID: JATR-3375-16 Rev. 1.

Revision Release Date Summary

1.4 2011/05/17 Revised section 2 Features, page 2.

Revised section 3 System Applications, page 3.

Added section 4 Block Diagram, page 5.

Revised Table 6 Reset, page 11.

Revised Table 10 Power and Ground, page 12.

Added section 7.5 Interrupt, page 15.

Revised section 7.7 Hardware Configuration, page 16.

Revised Figure 7 LED and PHY Address Configuration, page 17.

Revised section 7.9.2 Register Setting, page 18.

Revised section 7.10.4 Management Interface, page 19.

Revised section 7.10.5 Access to Extension Page (ExtPage), page 21.

Added section 7.16 PHY Reset (Hardware Reset), page 29.

Revised Table 23 BMCR (Basic Mode Control Register, Address 0x00), page 31.

Revised Table 37 PHYCR (PHY Specific Control Register, Address 0x10), page 39.

Revised Table 56 Absolute Maximum Ratings, page 56.

Revised Table 57 Recommended Operating Conditions, page 56.

Revised Table 60 DC Characteristics, page 58.

Revised section 10.6.1 MDC/MDIO Timing, page 59.

Revised section 10.6.2 MII Transmission Cycle Timing (RTL8211EG-VB Only), page 60.

Revised Table 66 Ordering Information, page 70.

1.5 2011/10/28 Revised section 4 Block Diagram, page 5.

Revised Table 35 MAADR (MMD Access Address Data Register, Address 0x0E), page

39.

Revised Table 39 INER (Interrupt Enable Register, Address 0x12), page 41.

Revised Table 55 Power Sequence parameter, page 55.

Revised Table 60 DC Characteristics, page 58.

Revised Table 62 MII Transmission Cycle Timing, page 60.

Revised Table 63 MII Reception Cycle Timing, page 61.

Revised section 10.6.5 RGMII Timing Modes, page 63.

1.6 2012/04/03 Revised Table 20 Register Mapping and Definitions, page 30.

Added Table 22 ExtPage Register Mapping and Definition, page 31.

Added Table 42 LDPSR (Link Down Power Saving Register, Address 0x1B), page 42.

Added Table 43 EPAGSR (Extension Page Select Register, Address 0x1E), page 42.

Added Table 51 LACR (LED Action Control Register, ExtPage 0x2c, Address 0x1a),

page 45.

Added Table 52 LCR (LED Control Register, ExtPage 0x2c, Address 0x1c), page 45.

Added Table 53 ACCR (Auto-Crossover Control Register, ExtPage 0x2d, Address

0x18)45, page 45.

Revised section 11.4 Mechanical Dimensions Notes (RTL8211EG-VB), page 69.

RTL8211E/RTL8211EG

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

Track ID: JATR-3375-16 Rev. 1.

Table of Contents

1. GENERAL DESCRIPTION..............................................................................................................................................1

2. FEATURES.........................................................................................................................................................................2

3. SYSTEM APPLICATIONS...............................................................................................................................................3

3.1. APPLICATION DIAGRAM (RTL8211E-VB)...................................................................................................................3

3.2. APPLICATION DIAGRAM (RTL8211EG-VB)................................................................................................................4

3.3. APPLICATION DIAGRAM (RTL8211E-VL)...................................................................................................................4

4. BLOCK DIAGRAM...........................................................................................................................................................5

5. PIN ASSIGNMENTS .........................................................................................................................................................6

5.1. RTL8211E-VB/RTL8211E-VL PIN ASSIGNMENTS (48-PIN QFN).............................................................................6

5.2. PACKAGE IDENTIFICATION...........................................................................................................................................6

5.3. RTL8211EG-VB PIN ASSIGNMENTS (64-PIN QFN)....................................................................................................7

5.4. PACKAGE IDENTIFICATION...........................................................................................................................................7

6. PIN DESCRIPTIONS ........................................................................................................................................................8

6.1. TRANSCEIVER INTERFACE............................................................................................................................................8

6.2. CLOCK .........................................................................................................................................................................8

6.3. RGMII.........................................................................................................................................................................9

6.4. GMII (RTL8211EG-VB ONLY) ..................................................................................................................................9

6.5. MANAGEMENT INTERFACE.........................................................................................................................................10

6.6. RESET ........................................................................................................................................................................11

6.7. MODE SELECTION ......................................................................................................................................................11

6.8. LED DEFAULT SETTINGS ...........................................................................................................................................11

6.9. REGULATOR AND REFERENCE....................................................................................................................................12

6.10. POWER AND GROUND ................................................................................................................................................12

6.11. NOT CONNECTED .......................................................................................................................................................12

7. FUNCTION DESCRIPTION ..........................................................................................................................................13

7.1. TRANSMITTER ............................................................................................................................................................13

7.1.1. RGMII/GMII (1000Mbps) Mode ..........................................................................................................................13

7.1.2. MII (100Mbps) Mode ...........................................................................................................................................13

7.1.3. MII (10Mbps) Mode .............................................................................................................................................13

7.2. RECEIVER...................................................................................................................................................................13

7.2.1. RGMII/GMII (1000Mbps) Mode ..........................................................................................................................13

7.2.2. MII (100Mbps) Mode ...........................................................................................................................................13

7.2.3. MII (10Mbps) Mode .............................................................................................................................................14

7.3. ENERGY EFFICIENT ETHERNET (EEE)........................................................................................................................14

7.4. WAKE-ON-LAN (WOL)............................................................................................................................................14

7.5. INTERRUPT .................................................................................................................................................................15

7.6. MDI INTERFACE ........................................................................................................................................................15

7.7. HARDWARE CONFIGURATION ....................................................................................................................................16

7.8. LED AND PHY ADDRESS CONFIGURATION ...............................................................................................................17

7.9. GREEN ETHERNET (1000/100MBPS MODE ONLY) .....................................................................................................18

7.9.1. Cable Length Power Saving .................................................................................................................................18

7.9.2. Register Setting.....................................................................................................................................................18

7.10. MAC/PHY INTERFACE ..............................................................................................................................................19

7.10.1. MII ...................................................................................................................................................................19

RTL8211E/RTL8211EG

Datasheet

Integrated 10/100/1000M Ethernet Transceiver

Track ID: JATR-3375-16 Rev. 1.

7.10.2. GMII ................................................................................................................................................................19

7.10.3. RGMII..............................................................................................................................................................19

7.10.4. Management Interface .....................................................................................................................................19

7.10.5. Access to Extension Page (ExtPage) ...............................................................................................................21

7.10.6. Access to MDIO Manageable Device (MMD).................................................................................................21

7.11. AUTO-NEGOTIATION..................................................................................................................................................22

7.11.1. Auto-Negotiation Priority Resolution..............................................................................................................24

7.11.2. Auto-Negotiation Master/Slave Resolution .....................................................................................................25

7.11.3. Auto-Negotiation PAUSE/ASYMMETRIC PAUSE Resolution........................................................................25

7.12. CROSSOVER DETECTION AND AUTO-CORRECTION ....................................................................................................26

7.13. LED CONFIGURATION................................................................................................................................................27

7.14. POLARITY CORRECTION .............................................................................................................................................28

7.15. POWER .......................................................................................................................................................................29

7.16. PHY RESET (HARDWARE RESET) ..............................................................................................................................29

8. REGISTER DESCRIPTIONS.........................................................................................................................................30

8.1. REGISTER MAPPING AND DEFINITIONS.......................................................................................................................30

8.2. MMD REGISTER MAPPING AND DEFINITION..............................................................................................................31

8.3. EXTPAGE REGISTER MAPPING AND DEFINITION ........................................................................................................31

8.4. REGISTER TABLE .......................................................................................................................................................31

8.4.1. BMCR (Basic Mode Control Register, Address 0x00) .........................................................................................31

8.4.2. BMSR (Basic Mode Status Register, Address 0x01).............................................................................................33

8.4.3. PHYID1 (PHY Identifier Register 1, Address 0x02) ............................................................................................34

8.4.4. PHYID2 (PHY Identifier Register 2, Address 0x03) ............................................................................................34

8.4.5. ANAR (Auto-Negotiation Advertising Register, Address 0x04) ...........................................................................34

8.4.6. ANLPAR (Auto-Negotiation Link Partner Ability Register, Address 0x05) .........................................................35

8.4.7. ANER (Auto-Negotiation Expansion Register, Address 0x06).............................................................................36

8.4.8. ANNPTR (Auto-Negotiation Next Page Transmit Register, Address 0x07) .........................................................36

8.4.9. ANNPRR (Auto-Negotiation Next Page Receive Register, Address 0x08)...........................................................37

8.4.10. GBCR (1000Base-T Control Register, Address 0x09).....................................................................................37

8.4.11. GBSR (1000Base-T Status Register, Address 0x0A) .......................................................................................38

8.4.12. MACR (MMD Access Control Register, Address 0x0D) .................................................................................38

8.4.13. MAADR (MMD Access Address Data Register, Address 0x0E)......................................................................39

8.4.14. GBESR (1000Base-T Extended Status Register, Address 0x0F) .....................................................................39

8.4.15. PHYCR (PHY Specific Control Register, Address 0x10).................................................................................39

8.4.16. PHYSR (PHY Specific Status Register, Address 0x11)....................................................................................40

8.4.17. INER (Interrupt Enable Register, Address 0x12) ............................................................................................41

8.4.18. INSR (Interrupt Status Register, Address 0x13) ..............................................................................................42

8.4.19. RXERC (Receive Error Counter, Address 0x18) .............................................................................................42

8.4.20. LDPSR (Link Down Power Saving Register, Address 0x1B) ..........................................................................42

8.4.21. EPAGSR (Extension Page Select Register, Address 0x1E) .............................................................................42

8.4.22. PAGSEL (Page Select Register, Address 0x1F) ..............................................................................................43

8.4.23. PC1R (PCS Control 1 Register, MMD Device 3, Address 0x00) ....................................................................43

8.4.24. PS1R (PCS Status1 Register, MMD Device 3, Address 0x01) ........................................................................43

8.4.25. EEECR (EEE Capability Register, MMD Device 3, Address 0x14)................................................................44

8.4.26. EEEWER (EEE Wake Error Register, MMD Device 3, Address 0x16) ..........................................................44

8.4.27. EEEAR (EEE Advertisement Register, MMD Device 7, Address 0x3c) ..........................................................44

8.4.28. EEELPAR (EEE Link Partner Ability Register, MMD Device 7, Address 0x3d) ............................................44

8.4.29. LACR (LED Action Control Register, ExtPage 0x2c, Address 0x1a)..............................................................45

8.4.30. LCR (LED Control Register, ExtPage 0x2c, Address 0x1c)............................................................................45

8.4.31. ACCR (Auto-Crossover Control Register, ExtPage 0x2d, Address 0x18).......................................................45

9. SWITCHING REGULATOR..........................................................................................................................................46

9.1. PCB LAYOUT.............................................................................................................................................................46

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