Contents
5
April 2001 -- Revised December 2009 SPRS174P
Contents
Section Page
1 TMS320F281x, TMS320C281x DSPs 13......................................................
1.1 Features 13........................................................................
1.2 Getting Started 14...................................................................
2 Introduction 15............................................................................
2.1 Description 15......................................................................
2.2 Device Summary 16.................................................................
2.3 Pin Assignments 17..................................................................
2.3.1 Terminal Assignments for the GHH Package 17................................
2.3.2 Pin Assignments for the PGF Package 18.....................................
2.3.3 Pin Assignments for the PBK Package 19.....................................
2.4 Signal Descriptions 20...............................................................
3 Functional Overview 30....................................................................
3.1 Memory Map 31.....................................................................
3.2 Brief Descriptions 36.................................................................
3.2.1 C28x CPU 36.............................................................
3.2.2 Memory Bus (Harvard Bus Architecture) 37....................................
3.2.3 Peripheral Bus 37..........................................................
3.2.4 Real-Time JTAG and Analysis 37............................................
3.2.5 External Interface (XINTF) (2812 Only) 37.....................................
3.2.6 Flash (F281x Only) 38......................................................
3.2.7 ROM (C281x Only) 38......................................................
3.2.8 M0, M1 SARAMs 38........................................................
3.2.9 L0, L1, H0 SARAMs 38.....................................................
3.2.10 Boot ROM 38..............................................................
3.2.11 Security 39................................................................
3.2.12 Peripheral Interrupt Expansion (PIE) Block 40.................................
3.2.13 External Interrupts (XINT1, XINT2, XINT13, XNMI) 40..........................
3.2.14 Oscillator and PLL 40.......................................................
3.2.15 W atchdog 40..............................................................
3.2.16 Peripheral Clocking 41......................................................
3.2.17 Low-Power Modes 41......................................................
3.2.18 Peripheral Frames 0, 1, 2 (PFn) 41...........................................
3.2.19 General-Purpose Input/Output (GPIO) Multiplexer 41...........................
3.2.20 32-Bit CPU-T imers (0, 1, 2) 42...............................................
3.2.21 Control Peripherals 42......................................................
3.2.22 Serial Port Peripherals 42...................................................
3.3 Register Map 43.....................................................................
3.4 Device Emulation Registers 45........................................................
3.5 External Interface, XINTF (2812 Only) 46...............................................
3.5.1 T iming Registers 47........................................................
3.5.2 XREVISION Register 47....................................................
3.6 Interrupts 48........................................................................
3.6.1 External Interrupts 51.......................................................
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