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OV7725_datasheet.pdf
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© 2007 OmniVision Technologies, Inc. VarioPixel, OmniVision, and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc.
Version 1.1, March 30, 2007 OmniPixel2 and CameraChip are trademarks of OmniVision Technologies, Inc.
These specifications are subject to change without notice.
Advanced Information
Preliminary Datasheet
OV7725 Color CMOS VGA (640x480) CAMERACHIP
TM
Sensor
O
mni ision
®
with OmniPixel2
TM
Technology
General Description
The OV7725 CAMERACHIP™ image sensor is a low
voltage CMOS device that provides the full functionality of
a single-chip VGA camera and image processor in a small
footprint package. The OV7725 provides full-frame,
sub-sampled or windowed 8-bit/10-bit images in a wide
range of formats, controlled through the Serial Camera
Control Bus (SCCB) interface.
This device has an image array capable of operating at up
to 60 frames per second (fps) in VGA with complete user
control over image quality, formatting and output data
transfer. All required image processing functions,
including exposure control, gamma, white balance, color
saturation, hue control and more, are also programmable
through the SCCB interface. In addition, OmniVision
sensors use proprietary sensor technology to improve
image quality by reducing or eliminating common
lighting/electrical sources of image contamination, such
as fixed pattern noise, smearing, blooming, etc., to
produce a clean, fully stable color image.
Features
• High sensitivity for low-light operation
• Standard SCCB interface
• Output support for Raw RGB, RGB (GRB 4:2:2,
RGB565/555/444) and YCbCr (4:2:2) formats
• Supports image sizes: VGA, QVGA, and any size
scaling down from CIF to 40x30
• VarioPixel
®
method for sub-sampling
• Automatic image control functions including:
Automatic Exposure Control (AEC), Automatic Gain
Control (AGC), Automatic White Balance (AWB),
Automatic Band Filter (ABF), and Automatic
Black-Level Calibration (ABLC)
• Image quality controls including color saturation,
hue, gamma, sharpness (edge enhancement), and
anti-blooming
• ISP includes noise reduction and defect correction
• Lens shading correction
• Saturation level auto adjust (UV adjust)
• Edge enhancement level auto adjust
• De-noise level auto adjust
• Frame synchronization capability
Ordering Information
Pb
Note: The OV7725 uses a lead-free
package.
Product Package
OV07725-VL1A (Color, lead-free) 28-pin CSP2
Applications
• Cellular and picture phones
•Toys
• PC Multimedia
• Digital still cameras
Key Specifications
Figure 1 OV7725 Pinout (Top View)
Array Size 640 x 480
Power Supply
Digital Core 1.8VDC +
10%
Analog 3.0V to 3.3V
I/O
a
a. I/O power should be 2.45V or higher when using the internal
regulator for Core (1.8V); otherwise, it is necessary to provide
an external 1.8V for the Core power supply
1.7V to 3.3V
Power
Requirements
Active
120 mW typical
(60 fps VGA, YUV)
Standby < 20 µA
Temperature Range -20°C to +70°C
Output Format (8-bit)
• YUV/YCbCr 4:2:2
• RGB565/555/444
• GRB 4:2:2
•Raw RGB Data
Lens Size 1/4"
Lens Chief Ray Angle 25° non linear
Max Image Transfer Rate 60 fps for VGA
Sensitivity 3.0 V/(Lux
sec)
S/N Ratio 50 dB
Dynamic Range 60 dB
Scan Mode Progressive
Electronic Exposure Up to 510:1 (for selected fps)
Pixel Size 6.0 µm x 6.0 µm
Dark Current 40 mV/s
Well Capacity 26 Ke
-
Fixed Pattern Noise < 0.03% of V
PEAK-TO-PEAK
Image Area 3984 µm x 2952 µm
Package Dimensions 5345 µm x 5265 µm
A1
ADVDD
A2
RSTB
A3
VREFH
OV7725
A4
FSIN
A5
SCL
B1
ADGND
B2
VREFN
B4
AGND
B3
AVDD
B5
SDA
C1
PWDN
D1
D5
E1
D7
E2
D1
E5
DOVDD
F1
D9
F2
D3
F3
XCLK
F4
DOGND
F5
D2
A6
D0
B6
HREF
C6
VSYNC
D6
D4
E6
D6
F6
D8
E3
DVDD
E4
PCLK
7725CSP_DS_00
1

2 Proprietary to OmniVision Technologies, Inc. Version 1.1, March 30, 2007
OV7725 Color CMOS VGA OmniPixel2™ CAMERACHIP™ Sensor
O
mni ision
Functional Description
Figure 2 shows the functional block diagram of the OV7725 image sensor. The OV7725 includes:
• Image Sensor Array (total array of 656 x 488 pixels, with active pixels 640 x 480 in YUV mode)
• Analog Signal Processor
• A/D Converters
• Test Pattern Generator
• Digital Signal Processor (DSP)
• Image Scaler
• Timing Generator
• Digital Video Port
• SCCB Interface
Figure 2 Functional Block Diagram
column
sense amp
row select
image
array
HREF
PCLK
VSYNC
SCL
RSTB
FSIN
PWDN
clock
exposure/
gain detect
test pattern
generator
FIFODSP*
bufferbuffer
image
scaler
analog
processing
video timing
generator
DSP* (lens shading correction, de-noise, white/black pixel correction, auto white balance, etc.)note 1
exposure/gain
control
SCCB
interface
XCLK
SDA
registers
A/D
G
R
B
D[9:0]
video
port
7725CSP_DS_0
02

Functional Description
Version 1.1, March 30, 2007 Proprietary to OmniVision Technologies, Inc. 3
O
mni ision
Image Sensor Array
The OV7725 sensor has an image array of 656 x 488
pixels for a total of 320,128 pixels, of which 640 x 480
pixels are active (307,200 pixels). Figure 3 shows a
cross-section of the image sensor array.
Figure 3 Image Sensor Array
Timing Generator
In general, the timing generator controls the following
functions:
• Array control and frame generation
• Internal timing signal generation and distribution
• Frame rate timing
• Automatic Exposure Control (AEC)
• External timing outputs (VSYNC, HREF/HSYNC, and
PCLK)
Analog Signal Processor
This block performs all analog image functions including:
• Automatic Gain Control (AGC)
• Automatic White Balance (AWB)
A/D Converters
After the Analog Processing block, the bayer pattern Raw
signal is fed to a 10-bit analog-to-digital (A/D) converter
shared by G and BR channels. This A/D converter
operates at speeds up to 12 MHz and is fully synchronous
to the pixel rate (actual conversion rate is related to the
frame rate).
In addition to the A/D conversion, this block also has the
following functions:
• Digital Black-Level Calibration (BLC)
• Optional U/V channel delay
• Additional A/D range controls
blue
green
microlens
glass
microlensmicrolens
red
7725CSP_DS_003
In general, the combination of the A/D Range Multiplier
and A/D Range Control sets the A/D range and maximum
value to allow the user to adjust the final image brightness
as a function of the individual application.
Test Pattern Generator
The Test Pattern Generator features the following:
• 8-bar color bar pattern
• Shift "1" in output pin
Digital Signal Processor (DSP)
This block controls the interpolation from Raw data to
RGB and some image quality control.
• Edge enhancement (a two-dimensional high pass
filter)
• Color space converter (can change Raw data to RGB
or YUV/YCbCr)
• RGB matrix to eliminate color cross talk
• Hue and saturation control
• Programmable gamma control
• Transfer 10-bit data to 8-bit
Image Scaler
This block controls all output and data formatting required
prior to sending the image out. This block scales
YUV/RGB output from VGA to CIF and almost any size
under CIF.
Digital Video Port
Register bits COM2[1:0] increase I
OL
/I
OH
drive current
and can be adjusted as a function of the customer’s
loading.
SCCB Interface
The Serial Camera Control Bus (SCCB) interface controls
the C
AMERACHIP sensor operation. Refer to OmniVision
Technologies Serial Camera Control Bus (SCCB)
Specification for detailed usage of the serial control port.

4 Proprietary to OmniVision Technologies, Inc. Version 1.1, March 30, 2007
OV7725 Color CMOS VGA OmniPixel2™ CAMERACHIP™ Sensor
O
mni ision
Pin Description
Table 1 Pin Description
Pin Number Name Pin Type Function/Description
A1 ADVDD Power ADC power supply
A2 RSTB Input System reset input, active low
A3 VREFH Reference Reference voltage - connect to ground using a 0.1 µF capacitor
A4 FSIN Input Frame synchronize input
A5 SCL Input SCCB serial interface clock input
A6 D0
a
a. D[9:0] for 10-bit Raw RGB data (D[9] MSB, D[0] LSB)
Output Data output bit[0]
B1 ADGND Power ADC ground
B2 VREFN Reference Reference voltage - connect to ground using a 0.1 µF capacitor
B3 AVDD Power Analog power supply
B4 AGND Power Analog ground
B5 SDA I/O SCCB serial interface data I/O
B6 HREF Output HREF output
C1 PWDN Input (0)
b
b. Input (0) represents an internal pull-down resistor.
Power Down Mode Selection
0: Normal mode
1: Power down mode
C6 VSYNC Output Vertical sync output
D1 D5 Output Data output bit[5]
D6 D4 Output Data output bit[4]
E1 D7 Output Data output bit[7]
E2 D1 Output Data output bit[1]
E3 DVDD Power Power supply (+1.8 VDC) for digital logic core
E4 PCLK Output Pixel clock output
E5 DOVDD Power Digital power supply for I/O (1.7V ~ 3.3V)
E6 D6 Output Data output bit[6]
F1 D9
c
c. D[9:2] for 8-bit YUV or RGB565/RGB555 (D[9] MSB, D[2] LSB)
Output Data output bit[9]
F2 D3 Output Data output bit[3]
F3 XCLK Input System clock input
F4 DOGND Power Digital ground
F5 D2 Output Data output bit[2]
F6 D8 Output Data output bit[8]

Electrical Characteristics
Version 1.1, March 30, 2007 Proprietary to OmniVision Technologies, Inc. 5
O
mni ision
Electrical Characteristics
NOTE: Exceeding the Absolute Maximum ratings shown above invalidates all AC and DC electrical specifications and may
result in permanent device damage.
Table 2 Operating Conditions
Parameter Min Max
Operating temperature -20°C +70°C
Storage temperature
a
a. Exceeding the stresses listed may permanently damage the device. This is a stress rating only and functional operation
of the sensor at these and any other condition above those indicated in this specification is not implied. Exposure to
absolute maximum rating conditions for any extended period may affect reliability.
-40°C +125°C
Table 3 Absolute Maximum Ratings
Ambient Storage Temperature -40ºC to +95ºC
Supply Voltages (with respect to Ground)
V
DD-A
4.5 V
V
DD-C
3 V
V
DD-IO
4.5 V
All Input/Output Voltages (with respect to Ground) -0.3V to V
DD-IO
+0.5V
Lead-free Temperature, Surface-mount process 245ºC
Table 4 DC Characteristics (-20°C < T
A
< 70°C)
Symbol Parameter Condition Min Typ Max Unit
V
DD-A
DC supply voltage – analog – 3.0 3.3 3.6 V
V
DD-C
DC supply voltage – digital core – 1.62 1.8 1.98 V
V
DD-IO
DC supply voltage – I/O – 2.5 – 3.3 V
I
DDA
Active (operating) current See Note
a
a. At 25ºC, V
DD-A
= 3.3V, V
DD-C
= 1.8V, V
DD-IO
= 3.3V
I
DDA
= {I
DD-IO
+ I
DD-C
+ I
DD-A
}, f
CLK
= 24MHz at 30 fps YUV output, no I/O loading
10 + 8
b
b. I
DD-C
= 10mA, I
DD-A
= 8mA, without loading
mA
I
DDS-SCCB
Standby current
See Note
c
c. At 25ºC, V
DD-A
= 3.3V, V
DD-C
= 1.8V, V
DD-IO
= 3.3V
I
DDS-SCCB
refers to a SCCB-initiated Standby, while I
DDS-PWDN
refers to a PWDN pin-initiated Standby
1mA
I
DDS-PWDN
Standby current 10 20 µA
V
IH
Input voltage HIGH CMOS 0.7 x V
DD-IO
V
V
IL
Input voltage LOW 0.3 x V
DD-IO
V
V
OH
Output voltage HIGH CMOS 0.9 x V
DD-IO
V
V
OL
Output voltage LOW 0.1 x V
DD-IO
V
I
OH
Output current HIGH See Note
d
d. Standard Output Loading = 25pF, 1.2K
8mA
I
OL
Output current LOW 15 mA
I
L
Input/Output leakage GND to V
DD-IO
± 1 µA
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