Introduction
(This introduction is not part of IEEE Std 91-1984, IEEE Standard Graphic Symbols for Logic Functions, or of IEEE Std 91a-1991,
Supplement to IEEE Std 91-1984.)
Two standards are included in this document: IEEE Std 91-1984, IEEE Standard Graphic Symbols for Logic
Functions, and IEEE Std 91a-1991, Supplement to IEEE Std 91-1984. In this edition (published in 1996), the two
standards have been merged to make it more convenient for the user.
The following sections of the original IEEE Std 91-1984 were extensively revised and replaced by IEEE Std 91a-
1991:
Pictorial Table of Contents
Table of Contents
Section 6: Symbols for Highly Complex Functions
Appendix A: Recommended Symbol Proportions
Appendix D: Integrated Circuits Used as Examples, Commercial Part Numbers vs. Symbol Numbers
Index
Numerous other revisions to IEEE Std 91-1984 in Sections 1 through 5 were made. The new Table of Contents and the
new Index indicate specifically where revisions were made. Further, change bars marked in the outside margins
indicate the locations of significant changes. Each standard has a unique foreword, included below.
IEEE Std 91-1984 foreword
This standard defines an international language by which it is possible to determine the functional behavior of a logic
circuit as described on a logic or circuit diagram with minimal reference to supporting documentation. Like natural
languages, the language set forth in this standard has been designed to allow a single concept to be expressed in one
of several different ways, according to the demands of a particular situation. Consequently, this standard does not
attempt, nor intend to establish single correct symbols for particular devices. A symbol appropriate for one application
of a device may not be appropriate for another.
The contributors to this standard represent a broad range of institutions, technologies, and documentation needs. They
include industrial, governmental, and educational organizations, producers and consumers of devices and equipment,
users and non-users of computer-aided design and drafting, and a considerable range of aesthetic preferences. That a
consensus of such diverse interests could be achieved in producing this standard is indicative of not only the utility of
the approach, but more importantly, of the increasing need among designers and maintainers of digital systems for a
common and more nearly complete symbolic language.
This revision is the result of a continuing activity to arrive at a useful notation to permit free interchange of
information on the design of binary-operated controls and systems. It is the latest step in a program that began in 1956
within the IEEE to develop a comprehensive single standard, consistent with ongoing developments in technology and
logic symbology, from several ad hoc, industry, military, and international standards. In 1960, an ad hoc group on
logic diagram graphic symbols was formed within the American National Standards Institute in order to develop a
draft American Standard. In 1961, this committee became a permanent subcommittee, Y32.14, of the Graphic
Symbols Committee, Y32, under the cosecretariat of ASME and IEEE. Its work resulted in the publication of IEEE
Std 91-1962 (ANSI Y32.14-1962 ), adopted in 1965 by the US Navy. The subcommittee was reorganized in 1969 to
prepare a new draft standard that would have broader acceptance and be in accord with the developments within the
International Electrotechnical Commission (IEC). ANSI/IEEE Std 91-1973 (Y32.14-1973) subsequently received
approval from ANSI, and the US Department of Defense, and was substantially compatible with IEC Pub 117-15,
Recommended Graphical Symbols: Binary Logic Elements. Since 1977 the preparing committee, IEEE SCC 11.9, has
worked closely with IEC Technical Committee 3 to prepare major new revisions of this standard and IEC Pub 617,
Part 12 (the successor to Pub 117, Part 15). The aim was for a US standard that would be mutually compatible with the
IEC standard, broadly acceptable, and that would provide notation or guidelines by which any SSI through VLSI