2004年DesignCon探讨SERDES架构与应用的关键洞察

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本文档标题"SERDES Architecture and APP 2004-NS"深入探讨了串行器/解串器（SerDes）架构及其在2004年设计会议（DesignCon2004）中的应用。作者Dave Lewis，来自国家半导体公司，强调了系统设计师在选择SerDes设备时常常忽视的重要内部架构考虑因素。尽管速度和功耗是常见的关注点，但实际上SerDes的工作原理及其对数据处理方式有着深远影响。 SerDes架构对系统设计的各个方面都有决定性作用，包括但不限于系统拓扑、协议开销、数据格式和流、延迟、时钟和定时要求，以及可能需要的额外缓冲逻辑。这些因素直接关系到系统的成本、性能和效率。文档中提到了四种主要的SerDes架构： 1. 并行时钟SerDes：这种架构利用多个独立的时钟信号进行数据传输，适合于对带宽需求高且对同步要求严格的环境，但可能增加复杂性和功耗。 2. 8b/10b编码SerDes：采用8位数据编码为10位，以解决信号干扰问题，提高数据可靠性，适用于需要纠错功能的应用，但会占用额外的线路资源。 3. 嵌入式时钟位（Start-Stop bit）SerDes：通过在数据流中插入特定的起始和停止位来简化时钟同步，适用于对数据完整性要求较高的场景，可能牺牲部分传输速率。 4. 比特间插塞SerDes：这种架构通过交错数据比特来分散时钟事件，降低噪声的影响，适用于长距离或高速串行通信，但增加了数据处理的复杂性。作者详细分析了这四种架构的特点和适用场景，旨在帮助设计师们根据实际应用需求选择最合适的SerDes解决方案。通过了解这些不同架构，系统设计师可以更好地权衡性能、成本和效率之间的平衡，从而在现代电子系统设计中取得最佳效果。

Introduction

Serial interconnects form the critical backbone of modern communications systems, so

the choice of serializer/deserializer (SerDes) can have a big impact on system cost and

performance. While the maze of choices may seem confusing at first, SerDes devices fall

into a few basic architectures, each tailored to specific application requirements. A basic

understanding of these architectural differences enables the designer to quickly find the

right SerDes for the application. In this article we examine four distinct SerDes

architectures and show how each plays a vital role in today’s systems.

SerDes Architectures

Parallel Clock SerDes

Figure 1. Parallel clock serializer coding example.

Parallel clock SerDes are normally used to serialize wide “data-address-control” parallel

buses such as PCI, UTOPIA, processor buses, and control buses, etc. Instead of tackling

the whole bus with one multiplexer, the parallel clock SerDes architecture employs a

bank of n-to-1 multiplexers, each serializing its section of the bus separately. The

resulting serial data streams travel to the receiver in parallel with an additional clock

signal pair that the receiver uses to latch in and recover the data. Since clock and data

travel on multiple pairs, pair-to-pair skew must be minimized for proper deserialization.

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