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LVDS_standards_TIA_EIA-644-A-2001.pdf

Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits
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TIA/EIA
STANDARD
Electrical Characteristics of Low
Voltage Differential Signaling (LVDS)
Interface Circuits
TIA/EIA-644-A
(Revision of TIA/EIA-644)
FEBRUARY 2001
TELECOMMUNICATIONS INDUSTRY ASSOCIATION
The Telecommunications Industry Association
Represents the Communications Sector of
ANSI/TIA/EIA-644-A-2001
Approved: January 30, 2001
TIA/EIA-644-A

NOTICE
TIA/EIA Engineering Standards and Publications are designed to serve the public interest through
eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and
improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the
proper product for his particular need. Existence of such Standards and Publications shall not in any
respect preclude any member or nonmember of TIA/EIA from manufacturing or selling products not
conforming to such Standards and Publications, nor shall the existence of such Standards and
Publications preclude their voluntary use by those other than TIA/EIA members, whether the standard is
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Standards Institute (ANSI) patent policy. By such action, TIA/EIA does not assume any liability to any
patent owner, nor does it assume any obligation whatever to parties adopting the Standard or
Publication.
This Standard does not purport to address all safety problems associated with its use or all applicable
regulatory requirements. It is the responsibility of the user of this Standard to establish appropriate
safety and health practices and to determine the applicability of regulatory limitations before its use.
(From Standards Proposal No. 4584, formulated under the cognizance of the TIA TR-30.2 Subcommittee
on DTE-DCE Interfaces Protocols.)
Published by
TELECOMMUNICATIONS INDUSTRY ASSOCIATION 2001
Standards and Technology Department
2500 Wilson Boulevard
Arlington, VA 22201
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EIA ELECTRONIC INDUSTRIES ALLIANCE STANDARDS and ENGINEERING
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ELECTRICAL CHARACTERISTICS OF LOW VOLTAGE DIFFERENTIAL SIGNALING
(LVDS) INTERFACE CIRCUITS
(From TIA/EIA Standard TIA/EIA-644 and Standards Proposal
No. 4584 formulated under the cognizance of TIA
Subcommittee TR-30.2 on Data Transmission Interfaces and Protocols)
Contents Page
1 SCOPE ................................................................................................................................. 1
2 DEFINITIONS, SYMBOLS AND ABBREVIATIONS ..................................................... 2
2.1 Data signaling rate................................................................................................ 2
2.2 DTE......................................................................................................................... 2
2.3 DCE........................................................................................................................ 2
2.4 LVDS...................................................................................................................... 2
2.5 Star (*) .................................................................................................................... 2
3 APPLICABILITY................................................................................................................... 3
3.1 General applicability............................................................................................. 3
3.2 Data signaling rate................................................................................................ 3
4 ELECTRICAL CHARACTERISTICS............................................................................... 5
4.1 Generator characteristics..................................................................................... 5
4.1.1 Full load test measurements............................................................................... 6
4.1.2 Offset voltage and balance measurements........................................................ 7
4.1.3 Short-circuit measurements................................................................................. 8
4.1.4 Output signal waveform ........................................................................................ 8
4.1.5 Dynamic output signal balance............................................................................ 9
4.2 Load characteristics ...........................................................................................10
4.2.1 Receiver input current - voltage measurements...............................................11
4.2.2 Receiver input balance measurements ............................................................11
4.2.3 Terminating receiver input current - voltage measurements and input
impedance measurements ................................................................................12
4.2.4 Receiver input sensitivity measurements .........................................................14
4.2.5 Media termination...............................................................................................15
4.3 Interconnecting media electrical characteristics..............................................16
4.3.1 Cable media........................................................................................................17
4.3.1.1 Maximum dc loop resistance (DCR):................................................................17
4.3.1.2 Characteristic impedance:.................................................................................17
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