XC6SLX16-2FTG256I.pdf_xc6slx9-2ftg256c

FPGA

需积分: 50 710 浏览量更新于2023-05-29 评论收藏 1.78MB PDF 举报

身份认证购VIP最低享 7 折!

领优惠券(最高得80元）

资源详情

资源评论

资源推荐

DS162 (v3.1.1) January 30, 2015 www.xilinx.com

Product Specification 1

States and other countries. All other trademarks are the property of their respective owners.

Spartan-6 FPGA Electrical Characteristics

Spartan®-6 LX and LXT FPGAs are available in various speed grades, with -3 having the highest performance. The DC and

AC electrical parameters of the Automotive XA Spartan-6 FPGAs and Defense-grade Spartan-6Q FPGAs devices are

equivalent to the commercial specifications except where noted. The timing characteristics of the commercial (XC) -2 speed

grade industrial device are the same as for a -2 speed grade commercial device. The -2Q and -3Q speed grades are

exclusively for the expanded (Q) temperature range. The timing characteristics are equivalent to those shown for the -2 and

-3 speed grades for the Automotive and Defense-grade devices.

Spartan-6 FPGA DC and AC characteristics are specified for commercial (C), industrial (I), and expanded (Q) temperature

ranges. Only selected speed grades and/or devices might be available in the industrial or expanded temperature ranges for

Automotive and Defense-grade devices. References to device names refer to all available variations of that part number (for

example, LX75 could denote XC6SLX75, XA6SLX75, or XQ6SLX75). The Spartan-6 FPGA -3N speed grade designates

devices that do not support MCB functionality.

All supply voltage and junction temperature specifications are representative of worst-case conditions. The parameters

included are common to popular designs and typical applications.

Available device and package combinations can be found at:

• DS160

: Spartan-6 Family Overview

• DS170

: Automotive XA Spartan-6 Family Overview

• DS172

: Defense-Grade Spartan-6Q Family Overview

This Spartan-6 FPGA data sheet, part of an overall set of documentation on the Spartan-6 family of FPGAs, is available on

the Xilinx website at http://www.xilinx.com/support/documentation/spartan-6.htm

Spartan-6 FPGA DC Characteristics

Spartan-6 FPGA Data Sheet:

DC and Switching Characteristics

DS162 (v3.1.1) January 30, 2015 Product Specification

Table 1: Absolute Maximum Ratings

(1)

Symbol Description Units

CCINT

Internal supply voltage relative to GND –0.5 to 1.32 V

CCAUX

Auxiliary supply voltage relative to GND –0.5 to 3.75 V

CCO

Output drivers supply voltage relative to GND –0.5 to 3.75 V

BATT

Key memory battery backup supply (LX75, LX75T, LX100, LX100T, LX150, and LX150T only) –0.5 to 4.05 V

External voltage supply for eFUSE programming (LX75, LX75T, LX100, LX100T, LX150, and

LX150T only)

(2)

–0.5 to 3.75 V

REF

Input reference voltage –0.5 to 3.75 V

Spartan-6 FPGA Data Sheet: DC and Switching Characteristics

DS162 (v3.1.1) January 30, 2015 www.xilinx.com

Product Specification 2

and V

(3)

I/O input voltage or voltage

applied to 3-state output,

relative to GND

(4)

All user and dedicated

I/Os

Commercial

DC –0.60 to 4.10 V

20% overshoot duration –0.75 to 4.25 V

8% overshoot duration

(5)

–0.75 to 4.40 V

Industrial

DC –0.60 to 3.95 V

20% overshoot duration –0.75 to 4.15 V

4% overshoot duration

(5)

–0.75 to 4.40 V

Expanded (Q)

DC –0.60 to 3.95 V

20% overshoot duration –0.75 to 4.15 V

4% overshoot duration

(5)

–0.75 to 4.40 V

Restricted to

maximum of 100 user

I/Os

Commercial

20% overshoot duration –0.75 to 4.35 V

15% overshoot duration

(5)

–0.75 to 4.40 V

10% overshoot duration –0.75 to 4.45 V

Industrial

20% overshoot duration –0.75 to 4.25 V

10% overshoot duration –0.75 to 4.35 V

8% overshoot duration

(5)

–0.75 to 4.40 V

Expanded (Q)

20% overshoot duration –0.75 to 4.25 V

10% overshoot duration –0.75 to 4.35 V

8% overshoot duration

(5)

–0.75 to 4.40 V

STG

Storage temperature (ambient) –65 to 150 °C

SOL

Maximum soldering temperature

(6)

(TQG144, CPG196, CSG225, CSG324, CSG484, and FTG256)

+260 °C

Maximum soldering temperature

(6)

(Pb-free packages: FGG484, FGG676, and FGG900) +250 °C

Maximum soldering temperature

(6)

(Pb packages: CS484, FT256, FG484, FG676, and FG900) +220 °C

Maximum junction temperature

(6)

+125 °C

Notes:

1. Stresses beyond those listed under Absolute Maximum Ratings might cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those listed under Operating Conditions is not implied.

Exposure to Absolute Maximum Ratings conditions for extended periods of time might affect device reliability.

2. When programming eFUSE, V

≤ V

CCAUX

. Requires up to 40 mA current. For read mode, V

can be between GND and 3.45 V.

3. I/O absolute maximum limit applied to DC and AC signals. Overshoot duration is the percentage of a data period that the I/O is stressed

beyond 3.45V.

4. For I/O operation, refer to UG381

: Spartan-6 FPGA SelectIO Resources User Guide.

5. Maximum percent overshoot duration to meet 4.40V maximum.

6. T

SOL

is the maximum soldering temperature for component bodies. For soldering guidelines and thermal considerations,

see UG385

: Spartan-6 FPGA Packaging and Pinout Specification.

Table 1: Absolute Maximum Ratings

(1)

(Cont’d)

Symbol Description Units

Spartan-6 FPGA Data Sheet: DC and Switching Characteristics

DS162 (v3.1.1) January 30, 2015 www.xilinx.com

Product Specification 3

Table 2: Recommended Operating Conditions

(1)

Symbol Description Min Typ Max Units

CCINT

Internal supply voltage relative to GND

-3, -3N, -2 Standard performance

(2)

1.14 1.2 1.26 V

-3, -2 Extended performance

(2)

1.2 1.23 1.26 V

-1L Standard performance

(2)

0.95 1.0 1.05 V

CCAUX

(3)(4)

Auxiliary supply voltage relative to GND

CCAUX

=2.5V

(5)

2.375 2.5 2.625 V

CCAUX

= 3.3V 3.15 3.3 3.45 V

CCO

(6)(7)(8)

Output supply voltage relative to GND 1.1 – 3.45 V

Input voltage relative to GND

All I/O

standards

(except PCI)

Commercial temperature (C) –0.5 – 4.0 V

Industrial temperature (I) –0.5 – 3.95 V

Expanded (Q) temperature –0.5 – 3.95 V

PCI I/O standard

(9)

–0.5 – V

CCO

+0.5 V

(10)

Maximum current through pin using PCI I/O standard

when forward biasing the clamp diode.

(9)

Commercial (C) and

Industrial temperature (I)

–– 10mA

Expanded (Q) temperature – – 7 mA

Maximum current through pin when forward biasing the ground clamp diode. – – 10 mA

BATT

(11)

Battery voltage relative to GND, T

=0°C to +85°C

(LX75, LX75T, LX100, LX100T, LX150, and LX150T only)

1.0 – 3.6 V

Junction temperature operating range

Commercial (C) range 0 – 85 °C

Industrial temperature (I) range –40 – 100 °C

Expanded (Q) temperature range –40 – 125 °C

Notes:

1. All voltages are relative to ground.

2. See Interface Performances for Memory Interfaces in Ta bl e 25. The extended performance range is specified for designs not using the

standard V

CCINT

voltage range. The standard V

CCINT

voltage range is used for:

• Designs that do not use an MCB

• LX4 devices

• Devices in the TQG144 or CPG196 packages

• Devices with the -3N speed grade

3. Recommended maximum voltage droop for V

CCAUX

is 10 mV/ms.

4. During configuration, if V

CCO_2

is 1.8V, then V

CCAUX

must be 2.5V.

5. The -1L devices require V

CCAUX

= 2.5V when using the LVDS_25, LVDS_33, BLVDS_25, LVPECL_25, RSDS_25, RSDS_33, PPDS_25,

and PPDS_33 I/O standards on inputs. LVPECL_33 is not supported in the -1L devices.

6. Configuration data is retained even if V

CCO

drops to 0V.

7. Includes V

CCO

of 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.

8. For PCI systems, the transmitter and receiver should have common supplies for V

CCO

9. Devices with a -1L speed grade do not support Xilinx PCI IP.

10. Do not exceed a total of 100 mA per bank.

11. V

BATT

is required to maintain the battery backed RAM (BBR) AES key when V

CCAUX

is not applied. Once V

CCAUX

is applied, V

BATT

can be

unconnected. When BBR is not used, Xilinx recommends connecting to V

CCAUX

or GND. However, V

BATT

can be unconnected.

Spartan-6 FPGA Data Sheet: DC and Switching Characteristics

DS162 (v3.1.1) January 30, 2015 www.xilinx.com

Product Specification 5

Table 4: DC Characteristics Over Recommended Operating Conditions

Symbol Description Min Typ Max Units

DRINT

Data retention V

CCINT

voltage (below which configuration data might be lost) 0.8 – – V

DRAUX

Data retention V

CCAUX

voltage (below which configuration data might be lost) 2.0 – – V

REF

leakage current per pin for commercial (C) and industrial (I) devices –10 – 10 µA

REF

leakage current per pin for expanded (Q) devices –15 – 15 µA

Input or output leakage current per pin (sample-tested) for commercial (C) and industrial

(I) devices

–10 – 10 µA

Input or output leakage current per pin (sample-tested) for expanded (Q) devices –15 – 15 µA

Leakage current on pins during hot

socketing with FPGA unpowered

All pins except PROGRAM_B, DONE, and

JTAG pins when HSWAPEN = 1

–20 – 20 µA

PROGRAM_B, DONE, and JTAG pins, or other

pins when HSWAPEN = 0

HS(HSWAPEN = 1)

RPU

µA

(1)

Die input capacitance at the pad – – 10 pF

RPU

Pad pull-up (when selected) @ V

=0V, V

CCO

=3.3V or V

CCAUX

= 3.3V 200 – 500 µA

Pad pull-up (when selected) @ V

=0V, V

CCO

=2.5V or V

CCAUX

= 2.5V 120 – 350 µA

Pad pull-up (when selected) @ V

=0V, V

CCO

= 1.8V 60 – 200 µA

Pad pull-up (when selected) @ V

=0V, V

CCO

= 1.5V 40 – 150 µA

Pad pull-up (when selected) @ V

=0V, V

CCO

= 1.2V 12 – 100 µA

RPD

Pad pull-down (when selected) @ V

CCO

, V

CCAUX

= 3.3V 200 – 550 µA

Pad pull-down (when selected) @ V

CCO

, V

CCAUX

= 2.5V 140 – 400 µA

BATT

(2)

Battery supply current – – 150 nA

(3)

Resistance of optional input differential termination circuit, V

CCAUX

=3.3V – 100 – Ω

IN_TERM

(5)