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July 10, 2015 Page 1 of 316 Rev 1.00

NUC970

Document Information

Abstract

This document introduces the control sequence of NUC970 family

peripherals.

Apply to

NUC970 family, including NUC972, NUC973, NUC976 and NUC977.

The information described in this document is the exclusive intellectual property of

Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.

Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based system design.

Nuvoton assumes no responsibility for errors or omissions.

All data and specifications are subject to change without notice.

For additional information or questions, please contact: Nuvoton Technology Corporation.

www.nuvoton.com

NUC970 Family Programming Guide

July 10, 2015 Page 2 of 316 Rev 1.00

NUC970

Table of Contents

1 SYSTEM MANAGER ................................................................................................... 12

1.1 Overview.............................................................................................................................................................. 12

1.2 Register Map ..................................................................................................................................................... 12

1.3 Functional Description ................................................................................................................................. 13

Multiple Function Control ............................................................................................................................. 13

1.3.1

Low Voltage Detect / Reset ........................................................................................................................ 14

1.3.2

USB ID Detection ........................................................................................................................................... 14

1.3.3

2 CLOCK CONTROLLER .............................................................................................. 15

2.1 Overview.............................................................................................................................................................. 15

2.2 Features............................................................................................................................................................... 15

2.3 Block Diagram .................................................................................................................................................. 15

2.4 Register Map ..................................................................................................................................................... 17

2.5 Functional Description ................................................................................................................................. 17

Module Clock On/Off ..................................................................................................................................... 17

2.5.1

Clock Divider .................................................................................................................................................... 18

2.5.2

PLL Setting ....................................................................................................................................................... 18

2.5.3

3 ANALOG TO DIGITAL CONVERTER (ADC).......................................................... 20

3.1 Overview.............................................................................................................................................................. 20

3.2 Features............................................................................................................................................................... 20

3.3 Block Diagram .................................................................................................................................................. 20

3.4 Register Map ..................................................................................................................................................... 21

3.5 Functional Description ................................................................................................................................. 22

Basic Configuration........................................................................................................................................ 22

3.5.1

ADC Transfer Function ................................................................................................................................. 22

3.5.2

Normal Detection ............................................................................................................................................ 23

3.5.3

Battery Voltage Detection ............................................................................................................................ 24

3.5.4

Key Pad Scan .................................................................................................................................................. 25

3.5.5

4-wire and 5-wire Touch Screen ............................................................................................................... 27

3.5.6

4-wire Pressure Measurement................................................................................................................... 29

3.5.7

4 ADVANCED INTERRUPT CONTROLLER (AIC) ................................................... 31

4.1 Overview.............................................................................................................................................................. 31

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NUC970

4.2 Features............................................................................................................................................................... 31

4.3 Block Diagram .................................................................................................................................................. 32

4.4 Register Map ..................................................................................................................................................... 32

4.5 Functional Description ................................................................................................................................. 33

Interrupt channel configuration .................................................................................................................. 33

4.5.1

Interrupt Masking ............................................................................................................................................ 34

4.5.2

Interrupt Clearing and Setting .................................................................................................................... 34

4.5.3

Software Priority Scheme ............................................................................................................................ 35

4.5.4

Hardware Priority Scheme .......................................................................................................................... 36

4.5.5

Interrupt Sources ............................................................................................................................................ 37

4.5.6

5 CAN................................................................................................................................. 40

5.1 Overview.............................................................................................................................................................. 40

5.2 Features............................................................................................................................................................... 40

5.3 Block Diagram .................................................................................................................................................. 40

5.4 Register Map ..................................................................................................................................................... 41

5.5 Functional Description ................................................................................................................................. 43

CAN

5.5.1

Protocol ................................................................................................................................................... 43

CAN Baud Rate Setting................................................................................................................................ 43

5.5.2

CAN Module Register ................................................................................................................................... 46

5.5.3

Transfer CAN Message ................................................................................................................................ 47

5.5.4

Receive CAN Message ................................................................................................................................ 49

5.5.5

Wakeup Function............................................................................................................................................ 50

5.5.6

6 CRYPTOGRAPHIC ACCELERATOR ...................................................................... 51

6.1 Overview.............................................................................................................................................................. 51

6.2 Features............................................................................................................................................................... 51

6.3 Block Diagram .................................................................................................................................................. 52

6.4 Register Map ..................................................................................................................................................... 52

6.5 Functional Description ................................................................................................................................. 57

Data Access ..................................................................................................................................................... 58

6.5.1

Channel Expansion........................................................................................................................................ 59

6.5.2

PRNG ................................................................................................................................................................. 59

6.5.3

AES ..................................................................................................................................................................... 60

6.5.4

DES/TDES ........................................................................................................................................................ 61

6.5.5

SHA ..................................................................................................................................................................... 63

6.5.6

7 EXTERNAL BUS INTERFACE (EBI) ........................................................................ 66

7.1 Overview.............................................................................................................................................................. 66

7.2 Features............................................................................................................................................................... 66

7.3 Block Diagram .................................................................................................................................................. 66

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NUC970

7.4 Register Map ..................................................................................................................................................... 67

7.5 Functional Description ................................................................................................................................. 67

Basic Configuration........................................................................................................................................ 67

7.5.1

Memory Space and Control ........................................................................................................................ 67

7.5.2

8 ETHERNET MAC CONTROLLER (EMAC) ............................................................. 69

8.1 Overview.............................................................................................................................................................. 69

8.2 Features............................................................................................................................................................... 69

8.3 Block Diagram .................................................................................................................................................. 69

8.4 Register Map ..................................................................................................................................................... 70

8.5 Functional Description ................................................................................................................................. 72

PHY Control...................................................................................................................................................... 72

8.5.1

CAM Configuration......................................................................................................................................... 74

8.5.2

Control Frame .................................................................................................................................................. 74

8.5.3

Wake on Lan (WoL)....................................................................................................................................... 75

8.5.4

Packet Receive ............................................................................................................................................... 75

8.5.5

Packet Transmit .............................................................................................................................................. 80

8.5.6

Network Timing ............................................................................................................................................... 86

8.5.7

Error Handling.................................................................................................................................................. 90

8.5.8

9 ENHANCED TIMER CONTROLLER (ETMR) ......................................................... 91

9.1 Overview.............................................................................................................................................................. 91

9.2 Features............................................................................................................................................................... 91

9.3 Block Diagram .................................................................................................................................................. 91

9.4 Register Map ..................................................................................................................................................... 91

9.5 Functional Description ................................................................................................................................. 92

Timer Initialization........................................................................................................................................... 92

9.5.1

Timer Capture Initialization ......................................................................................................................... 92

9.5.2

Interrupt Handling ........................................................................................................................................... 93

9.5.3

Timer Frequency............................................................................................................................................. 93

9.5.4

One-Shot Mode ............................................................................................................................................... 94

9.5.5

Periodic Mode .................................................................................................................................................. 94

9.5.6

Toggle Mode .................................................................................................................................................... 95

9.5.7

Continuous Mode ........................................................................................................................................... 95

9.5.8

Free Counting Mode...................................................................................................................................... 96

9.5.9

Trigger Counting Mode ...................................................................................................................... 97

9.5.10

Counter Reset Mode........................................................................................................................... 98

9.5.11

Capture Debounce .............................................................................................................................. 99

9.5.12

10 FLASH MEMORY INTERFACE ............................................................................... 100

10.1 Overview............................................................................................................................................................ 100

10.2 Features............................................................................................................................................................. 100

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NUC970

10.3 Block Diagram ................................................................................................................................................ 100

10.4 Register Map ................................................................................................................................................... 101

10.5 Functional Description ............................................................................................................................... 103

DMA and FMI Global Control......................................................................................................... 103

10.5.1

NAND Flash ......................................................................................................................................... 103

10.5.2

eMMC..................................................................................................................................................... 107

10.5.3

11 GENERAL DMA CONTROLLER (GDMA)............................................................. 112

11.1 Overview............................................................................................................................................................ 112

11.2 Features............................................................................................................................................................. 112

11.3 Block Diagram ................................................................................................................................................ 112

11.4 Register Map ................................................................................................................................................... 113

11.5 Functional Description ............................................................................................................................... 114

Non-Descriptor Functional Descriptions .................................................................................... 114

11.5.1

Descriptor Functional Descriptions .............................................................................................. 118

11.5.2

12 2D GRAPHIC ENGINE (GE2D)................................................................................ 122

12.1 Overview............................................................................................................................................................ 122

12.2 Features............................................................................................................................................................. 122

12.3 Block Diagram ................................................................................................................................................ 123

12.4 Register Map ................................................................................................................................................... 123

12.5 Function Description ................................................................................................................................... 124

2D Graphic Engine Initialization.................................................................................................... 124

12.5.1

Ternary Raster Operations (ROP) ............................................................................................... 126

12.5.2

Bit Block Transfer (BitBLT) ............................................................................................................. 127

12.5.3

Bresenham Line Drawing................................................................................................................ 131

12.5.4

............................................................................................................................................. 135

12.5.5

Clipping.................................................................................................................................................. 136

12.5.6

Rotation ................................................................................................................................................. 137

12.5.7

Scale Up/Down ................................................................................................................................... 138

12.5.8

13 GENERAL-PURPOSE INPUT/OUTPUT (GPIO) .................................................. 141

13.1 Overview............................................................................................................................................................ 141

13.2 Features............................................................................................................................................................. 141

13.3 Block Diagram ................................................................................................................................................ 141

13.4 Register Map ................................................................................................................................................... 142

13.5 Functional Description ............................................................................................................................... 146

Multiple function pin Configuration............................................................................................... 146

13.5.1

GPIO Output Mode............................................................................................................................ 147

13.5.2

GPIO Input Mode ............................................................................................................................... 147

13.5.3

GPIO Interrupt..................................................................................................................................... 148

13.5.4