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RTC-PCF8563TS 实时时钟.pdf
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The PCF8563 is a CMOS1 Real-Time Clock (RTC) and calendar optimized for low power consumption. A programmable clock output, interrupt output, and voltage-low detector are also provided. All addresses and data are transferred serially via a two-line bidirectional I2C-bus. Maximum bus speed is 400 kbit/s. The register address is incremented automatically after each written or read data byte.
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1. General description
The PCF8563 is a CMOS
1
Real-Time Clock (RTC) and calendar optimized for low power
consumption. A programmable clock output, interrupt output, and voltage-low detector are
also provided. All addresses and data are transferred serially via a two-line bidirectional
I
2
C-bus. Maximum bus speed is 400 kbit/s. The register address is incremented
automatically after each written or read data byte.
2. Features and benefits
Provides year, month, day, weekday, hours, minutes, and seconds based on a
32.768 kHz quartz crystal
Century flag
Clock operating voltage: 1.0 V to 5.5 V at room temperature
Low backup current; typical 0.25 Aat V
DD
= 3.0 V and T
amb
=25C
400 kHz two-wire I
2
C-bus interface (at V
DD
= 1.8 V to 5.5 V)
Programmable clock output for peripheral devices (32.768 kHz, 1.024 kHz, 32 Hz, and
1Hz)
Alarm and timer functions
Integrated oscillator capacitor
Internal Power-On Reset (POR)
I
2
C-bus slave address: read A3h and write A2h
Open-drain interrupt pin
3. Applications
Mobile telephones
Portable instruments
Electronic metering
Battery powered products
PCF8563
Real-time clock/calendar
Rev. 10 — 3 April 2012 Product data sheet
1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 18.
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 3 April 2012 2 of 50
NXP Semiconductors
PCF8563
Real-time clock/calendar
4. Ordering information
[1] Not to be used for new designs. Replacement part is PCF8563T/5.
[2] Not to be used for new designs. Replacement part is PCF8563TS/5.
5. Marking
Table 1. Ordering information
Type number Package
Name Description Version
PCF8563BS/4 HVSON10 plastic thermal enhanced very thin small outline
package; no leads; 10 terminals;
body 3 3 0.85 mm
SOT650-1
PCF8563P/F4 DIP8 plastic dual in-line package; 8 leads (300 mil) SOT97-1
PCF8563T/5 SO8 plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
PCF8563T/F4
[1]
SO8 plastic small outline package; 8 leads;
body width 3.9 mm
SOT96-1
PCF8563TS/4
[2]
TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm
SOT505-1
PCF8563TS/5 TSSOP8 plastic thin shrink small outline package; 8 leads;
body width 3 mm
SOT505-1
Table 2. Marking codes
Type number Marking code
PCF8563BS/4 8563S
PCF8563P/F4 PCF8563P
PCF8563T/5 PCF8563
PCF8563T/F4 8563T
PCF8563TS/4 8563
PCF8563TS/5 P8563
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 3 April 2012 3 of 50
NXP Semiconductors
PCF8563
Real-time clock/calendar
6. Block diagram
(1) C
OSCO
; values see Ta ble 3 0.
Fig 1. Block diagram of PCF8563
001aah658
PCF8563
OSCILLATOR
32.768 kHz
DIVIDER CLOCK OUT
INTERRUPT
CLKOUT
INT
MONITOR
POWER ON
RESET
WATCH
DOG
I
2
C-BUS
INTERFACE
OSCI
SCL
SDA
OSCO
V
DD
V
SS
TIMER FUNCTION
TIMER_CONTROL0E
TIMER0F
CONTROL
CONTROL_STATUS_100
CONTROL_STATUS_201
CLKOUT_CONTROL0D
TIME
VL_SECONDS02
MINUTES03
HOURS04
DAYS05
ALARM FUNCTION
MINUTE_ALARM09
HOUR_ALARM0A
DAY_ALARM0B
WEEKDAY_ALARM0C
WEEKDAYS06
CENTURY_MONTHS07
YEARS08
(1)
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 3 April 2012 4 of 50
NXP Semiconductors
PCF8563
Real-time clock/calendar
7. Pinning information
7.1 Pinning
For mechanical details, see Figure 30. Top view. For mechanical details, see
Figure 31
.
Fig 2. Pin configuration for HVSON10
(PCF8563BS)
Fig 3. Pin configuration for DIP8
(PCF8563P)
Top view. For mechanical details, see
Figure 32
.
Top view. For mechanical details, see
Figure 33.
Fig 4. Pin configuration for SO8
(PCF8563T)
Fig 5. Pin configuration for TSSOP8
(PCF8563TS)
001aaf981
PCF8563BS
SDA
INT
V
SS
SCL
n.c. CLKOUT
OSCO V
DD
OSCI n.c.
Transparent top view
5
6
4 7
3 8
2 9
1 10
terminal 1
index area
PCF8563P
OSCI
V
DD
OSCO
CLKOUT
INT
SCL
V
SS
SDA
001aaf977
1
2
3
4
6
5
8
7
PCF8563T
OSCI V
DD
OSCO CLKOUT
INT
SCL
V
SS
SDA
001aaf975
1
2
3
4
6
5
8
7
PCF8563TS
OSCI V
DD
OSCO CLKOUT
INT SCL
V
SS
SDA
001aaf976
1
2
3
4
6
5
8
7
PCF8563 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 10 — 3 April 2012 5 of 50
NXP Semiconductors
PCF8563
Real-time clock/calendar
7.2 Pin description
[1] The die paddle (exposed pad) is wired to V
SS
but should not be electrically connected.
Table 3. Pin description
Symbol Pin Description
DIP8, SO8, TSSOP8 HVSON10
OSCI 1 1 oscillator input
OSCO 2 2 oscillator output
INT
3 4 interrupt output (open-drain; active LOW)
V
SS
45
[1]
ground
SDA 5 6 serial data input and output
SCL 6 7 serial clock input
CLKOUT 7 8 clock output, open-drain
V
DD
8 9 supply voltage
n.c. - 3, 10 not connected; do not connect and do not
use as feed through
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