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Akhilesh Kumar
Intel Corporation, 2017
Authors: Don Soltis, Irma Esmer, Adi Yoaz, Sailesh Kottapalli
New Intel® Xeon® Scalable Processor Family (Skylake-SP) – Hot Chips 2017
2
Notices and Disclaimers
This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel
representative to obtain the latest forecast, schedule, specifications and roadmaps.
Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software or service activation. Learn more at intel.com, or from the
OEM or retailer.
No computer system can be absolutely secure.
Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark,
are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should
consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with
other products. For more complete information visit http://www.intel.com/performance.
Optimization Notice: Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors.
These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any
optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain
optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information
regarding the specific instruction sets covered by this notice.
Tests document performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult
other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit
http://www.intel.com/performance.
Results have been estimated or simulated using internal Intel analysis or architecture simulation or modeling, and provided to you for informational purposes. Any differences in
your system hardware, software or configuration may affect your actual performance.
Cost reduction scenarios described are intended as examples of how a given Intel-based product, in the specified circumstances and configurations, may affect future costs and
provide cost savings. Circumstances will vary. Intel does not guarantee any costs or cost reduction.
Intel does not control or audit third-party benchmark data or the web sites referenced in this document. You should visit the referenced web site and confirm whether referenced
data are accurate.
Intel, the Intel logo, Intel Optane and Xeon are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the united states and other countries.
* Other names and brands may be claimed as the property of others. © 2017 Intel Corporation.
New Intel® Xeon® Scalable Processor Family (Skylake-SP) – Hot Chips 2017
Intel® Xeon® Scalable Processors
the foundation of data center innovation
Workload driven
performance
Compute, storage,
Network optimized
Simple and easy
to deploy
Architected for efficient, secure, and agile data center
3
New Intel® Xeon® Scalable Processor Family (Skylake-SP) – Hot Chips 2017
Agenda
Intel® Xeon® Scalable Processor Overview
Processor Architecture Details
Core Architecture
Interconnect and Cache Architecture
Memory Subsystem
IO Subsystem
Performance Benchmarks
Wrap UP
4
New Intel® Xeon® Scalable Processor Family (Skylake-SP) – Hot Chips 2017
Skylake core microarchitecture with data
center specific enhancements
Intel® AVX-512 with 32 DP flops per
cycle per core
Datacenter optimized cache hierarchy –
1MB L2 per core, non-inclusive L3
New mesh interconnect architecture
Enhanced memory subsystem
Modular IO with integrated devices
New Intel® Ultra Path Interconnect
(Intel® UPI)
Intel® Speed Shift Technology
Security & Virtualization enhancements
(MBE, PPK, MPX)
Optional Integrated Intel® Omni-Path
Fabric (Intel® OPA)
Intel® Xeon® Scalable Processor Overview
Re-architected from the ground up
Features Intel® Xeon® Processor E5/E7 v4 Intel® Xeon® Scalable Processor
Availability Q2 2016 Q3 2017
Cores Per Socket Up to 22 or 24 Up to 28
Threads Per Socket Up to 44 or 48 threads
Up to 56 threads
Last-level Cache (LLC) Up to 55MB or 60 MB
Up to 38.5 MB (non-inclusive)
QPI/UPI Speed (GT/s) 2x or 3x QPI channels @ 9.6 GT/s
Up to 3x UPI @ 10.4 GT/s
PCIe* Lanes/ Controllers 40 / 10 / PCIe* 3.0 (2.5, 5, 8 GT/s)
48 / 12 / PCIe 3.0 (2.5, 5, 8 GT/s)
Memory Population
4 channels of up to 3 RDIMMs,
LRDIMMs, or 3DS LRDIMMs
6 channels of up to 2 RDIMMs,
LRDIMMs, or 3DS LRDIMMs
Max Memory Speed Up to 2400 Up to 2666
TDP (W) 55W-145W
70W-205W
Core Core
Core Core
Core Core
Shared L3
UPI
UPI
2 or 3 UPI
6 Channels DDR4
48 Lanes
PCIe* 3.0
DMI3
DDR4
DDR4
DDR4
DDR4
DDR4
DDR4
UPI
Omni-Path HFI
Omni-Path
5
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