7.8. Underflow and Overflow........................................................................................62
7.9. Timing Constraints...............................................................................................63
7.10. Handling Ancillary Packets...................................................................................64
7.11. Modules for Clocked Video Input II IP Core............................................................ 66
7.12. Clocked Video Input II Signals, Parameters, and Registers.......................................68
7.12.1. Clocked Video Input II Interface Signals....................................................68
7.12.2. Clocked Video Input II Parameter Settings.................................................71
7.12.3. Clocked Video Input II Control Registers....................................................72
7.13. Clocked Video Output II Signals, Parameters, and Registers....................................73
7.13.1. Clocked Video Output II Interface Signals..................................................74
7.13.2. Clocked Video Output II Parameter Settings...............................................76
7.13.3. Clocked Video Output II Control Registers................................................. 78
7.14. Clocked Video Input Signals, Parameters, and Registers......................................... 81
7.14.1. Clocked Video Input Interface Signals....................................................... 81
7.14.2. Clocked Video Input Parameter Settings.................................................... 83
7.14.3. Clocked Video Input Control Registers.......................................................84
7.15. Clocked Video Output Signals, Parameters, and Registers........................................ 85
7.15.1. Clocked Video Output Interface Signals..................................................... 85
7.15.2. Clocked Video Output Parameter Settings.................................................. 87
7.15.3. Clocked Video Output Control Registers.....................................................89
8. 2D FIR II IP Core.......................................................................................................... 92
8.1. 2D FIR Filter Processing........................................................................................92
8.2. 2D FIR Filter Precision.......................................................................................... 93
8.3. 2D FIR Coefficient Specification............................................................................. 93
8.4. 2D FIR Filter Symmetry........................................................................................ 95
8.4.1. No Symmetry..........................................................................................96
8.4.2. Horizontal Symmetry................................................................................96
8.4.3. Vertical Symmetry................................................................................... 96
8.4.4. Horizontal and Vertical Symmetry.............................................................. 97
8.4.5. Diagonal Symmetry..................................................................................97
8.5. Result to Output Data Type Conversion................................................................... 98
8.6. Edge-Adaptive Sharpen Mode................................................................................ 99
8.6.1. Edge Detection........................................................................................ 99
8.6.2. Filtering..................................................................................................99
8.6.3. Precision............................................................................................... 100
8.7. 2D FIR Filter Parameter Settings.......................................................................... 100
8.8. 2D FIR Filter Control Registers............................................................................. 102
9. Mixer II IP Core.......................................................................................................... 104
9.1. Alpha Blending.................................................................................................. 105
9.2. Mixer II Parameter Settings.................................................................................106
9.3. Video Mixing Control Registers.............................................................................107
9.4. Layer Mapping................................................................................................... 108
10. Chroma Resampler II IP Core................................................................................... 110
10.1. Chroma Resampler Algorithms........................................................................... 111
10.1.1. Nearest Neighbor................................................................................. 111
10.1.2. Bilinear............................................................................................... 113
10.1.3. Filtered............................................................................................... 115
10.2. Chroma Resampler Parameter Settings................................................................115
10.3. Chroma Resampler Control Registers.................................................................. 117
Contents
Video and Image Processing Suite User Guide
3
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