STM32L476资料_stm32L476

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December 2015 DocID025976 Rev 4 1/232

STM32L476xx

Ultra-low-power ARM

Cortex

-M4 32-bit MCU+FPU, 100DMIPS,

up to 1MB Flash, 128 KB SRAM, USB OTG FS, LCD, analog, audio

Datasheet - production data

Features

• Ultra-low-power with FlexPowerControl

– 1.71 V to 3.6 V power supply

– -40 °C to 85/105/125 °C temperature range

– 300 nA in V

BAT

mode: supply for RTC and

32x32-bit backup registers

– 30 nA Shutdown mode (5 wakeup pins)

– 120 nA Standby mode (5 wakeup pins)

– 420 nA Standby mode with RTC

– 1.1 µA Stop 2 mode, 1.4 µA Stop 2 with

RTC

– 100 µA/MHz run mode

– Batch acquisition mode (BAM)

– 4 µs wakeup from Stop mode

– Brown out reset (BOR) in all modes except

shutdown

– Interconnect matrix

• Core: ARM

32-bit Cortex

-M4 CPU with FPU,

Adaptive real-time accelerator (ART

Accelerator™) allowing 0-wait-state execution

from Flash memory, frequency up to 80 MHz,

MPU, 100DMIPS/1.25DMIPS/MHz (Dhrystone

2.1), and DSP instructions

• Clock Sources

– 4 to 48 MHz crystal oscillator

– 32 kHz crystal oscillator for RTC (LSE)

– Internal 16 MHz factory-trimmed RC (±1%)

– Internal low-power 32 kHz RC (±5%)

– Internal multispeed 100 kHz to 48 MHz

oscillator, auto-trimmed by LSE (better than

±0.25 % accuracy)

– 3 PLLs for system clock, USB, audio, ADC

• RTC with HW calendar, alarms and calibration

• LCD 8 × 40 or 4 × 44 with step-up converter

• Up to 24 capacitive sensing channels: support

touchkey, linear and rotary touch sensors

• 16x timers: 2 x 16-bit advanced motor-control,

2 x 32-bit and 5 x 16-bit general purpose, 2x

16-bit basic, 2x low-power 16-bit timers

(available in Stop mode), 2x watchdogs,

SysTick timer

• Up to 114 fast I/Os, most 5 V-tolerant, up to 14

I/Os with independent supply down to 1.08 V

• Memories

– Up to 1 MB Flash, 2 banks read-while-

write, proprietary code readout protection

– Up to 128 KB of SRAM including 32 KB

with hardware parity check

– External memory interface for static

memories supporting SRAM, PSRAM,

NOR and NAND memories

– Quad SPI memory interface

• 4x digital filters for sigma delta modulator

• Rich analog peripherals (independent supply)

– 3× 12-bit ADC 5 Msps, up to 16-bit with

hardware oversampling, 200 µA/Msps

– 2x 12-bit DAC, low-power sample and hold

– 2x operational amplifiers with built-in PGA

– 2x ultra-low-power comparators

• 18x communication interfaces

– USB OTG 2.0 full-speed, LPM and BCD

– 2x SAIs (serial audio interface)

–3x I2C FM+(1 Mbit/s), SMBus/PMBus

– 6x USARTs (ISO 7816, LIN, IrDA, modem)

– 3x SPIs (4x SPIs with the Quad SPI)

– CAN (2.0B Active) and SDMMC interface

– SWPMI single wire protocol master I/F

• 14-channel DMA controller

• True random number generator

• CRC calculation unit, 96-bit unique ID

• Development support: serial wire debug

(SWD), JTAG, Embedded Trace Macrocell™

Table 1. Device summary

Reference Part number

STM32L476xx

STM32L476RG, STM32L476JG, STM32L476MG,

STM32L476ME, STM32L476VG, STM32L476QG,

STM32L476ZG, STM32L476RE, STM32L476JE,

STM32L476VE, STM32L476QE, STM32L476ZE,

STM32L476RC, STM32L476VC

(7 × 7)

LQFP144 (20 × 20)

LQFP100 (14 x 14)

LQFP64 (10 x 10)

UFBGA132

WLCSP72

WLCSP81

www.st.com

Contents STM32L476xx

2/232 DocID025976 Rev 4

Contents

1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1 ARM

Cortex

-M4 core with FPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.2 Adaptive real-time memory accelerator (ART Accelerator™) . . . . . . . . . 16

3.3 Memory protection unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.4 Embedded Flash memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 Embedded SRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.6 Firewall . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.7 Boot modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.8 Cyclic redundancy check calculation unit (CRC) . . . . . . . . . . . . . . . . . . . 19

3.9 Power supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.9.1 Power supply schemes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.9.2 Power supply supervisor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.9.3 Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.9.4 Low-power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.9.5 Reset mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.9.6 VBAT operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.10 Interconnect matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

3.11 Clocks and startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.12 General-purpose inputs/outputs (GPIOs) . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.13 Direct memory access controller (DMA) . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3.14 Interrupts and events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

3.14.1 Nested vectored interrupt controller (NVIC) . . . . . . . . . . . . . . . . . . . . . . 36

3.14.2 Extended interrupt/event controller (EXTI) . . . . . . . . . . . . . . . . . . . . . . 36

3.15 Analog to digital converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.15.1 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.15.2 Internal voltage reference (VREFINT) . . . . . . . . . . . . . . . . . . . . . . . . . . 38

3.15.3 VBAT battery voltage monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

3.16 Digital to analog converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

DocID025976 Rev 4 3/232

STM32L476xx Contents

3.17 Voltage reference buffer (VREFBUF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3.18 Comparators (COMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3.19 Operational amplifier (OPAMP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.20 Touch sensing controller (TSC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.21 Liquid crystal display controller (LCD) . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

3.22 Digital filter for Sigma-Delta Modulators (DFSDM) . . . . . . . . . . . . . . . . . . 41

3.23 Random number generator (RNG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

3.24 Timers and watchdogs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

3.24.1 Advanced-control timer (TIM1, TIM8) . . . . . . . . . . . . . . . . . . . . . . . . . . 43

3.24.2 General-purpose timers (TIM2, TIM3, TIM4, TIM5, TIM15, TIM16,

TIM17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

3.24.3 Basic timers (TIM6 and TIM7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

3.24.4 Low-power timer (LPTIM1 and LPTIM2) . . . . . . . . . . . . . . . . . . . . . . . . 44

3.24.5 Independent watchdog (IWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.24.6 System window watchdog (WWDG) . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.24.7 SysTick timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

3.25 Real-time clock (RTC) and backup registers . . . . . . . . . . . . . . . . . . . . . . 46

3.26 Inter-integrated circuit interface (I

C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

3.27 Universal synchronous/asynchronous receiver transmitter (USART) . . . 48

3.28 Low-power universal asynchronous receiver transmitter (LPUART) . . . . 49

3.29 Serial peripheral interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

3.30 Serial audio interfaces (SAI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

3.31 Single wire protocol master interface (SWPMI) . . . . . . . . . . . . . . . . . . . . 51

3.32 Controller area network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

3.33 Secure digital input/output and MultiMediaCards Interface (SDMMC) . . . 52

3.34 Universal serial bus on-the-go full-speed (OTG_FS) . . . . . . . . . . . . . . . . 52

3.35 Flexible static memory controller (FSMC) . . . . . . . . . . . . . . . . . . . . . . . . 53

3.36 Quad SPI memory interface (QUADSPI) . . . . . . . . . . . . . . . . . . . . . . . . . 54

3.37 Development support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

3.37.1 Serial wire JTAG debug port (SWJ-DP) . . . . . . . . . . . . . . . . . . . . . . . . . 55

3.37.2 Embedded Trace Macrocell™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

4 Pinouts and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

5 Memory mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88

Contents STM32L476xx

4/232 DocID025976 Rev 4

6 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1 Parameter conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.1 Minimum and maximum values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.2 Typical values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.3 Typical curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.4 Loading capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.5 Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.1.6 Power supply scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

6.1.7 Current consumption measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

6.2 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

6.3 Operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

6.3.1 General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

6.3.2 Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . 98

6.3.3 Embedded reset and power control block characteristics . . . . . . . . . . . 98

6.3.4 Embedded voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101

6.3.5 Supply current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103

6.3.6 Wakeup time from low-power modes and voltage scaling

transition times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124

6.3.7 External clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 126

6.3.8 Internal clock source characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 131

6.3.9 PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136

6.3.10 Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

6.3.11 EMC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

6.3.12 Electrical sensitivity characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

6.3.13 I/O current injection characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 141

6.3.14 I/O port characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142

6.3.15 NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

6.3.16 Analog switches booster . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149

6.3.17 Analog-to-Digital converter characteristics . . . . . . . . . . . . . . . . . . . . . 150

6.3.18 Digital-to-Analog converter characteristics . . . . . . . . . . . . . . . . . . . . . 163

6.3.19 Voltage reference buffer characteristics . . . . . . . . . . . . . . . . . . . . . . . . 167

6.3.20 Comparator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169

6.3.21 Operational amplifiers characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 170

6.3.22 Temperature sensor characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

6.3.23 V

BAT

monitoring characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

6.3.24 LCD controller characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174

6.3.25 DFSDM characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 176

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