Application Timeline................................................................................................................. 72
Waveform View and Live Waveform Viewer.......................................................................... 74
Chapter 7: Debugging Applications and Kernels........................................78
Debugging Features and Techniques.....................................................................................78
Chapter 8: Command Line Flow............................................................................84
Host Code Compilation and Linking....................................................................................... 84
Kernel Code Compilation and Linking.................................................................................... 86
Using the sdaccel.ini File.......................................................................................................... 88
Chapter 9: Creating RTL Kernels.......................................................................... 92
Requirements for Using an RTL Design as an RTL Kernel....................................................92
RTL Kernel Wizard..................................................................................................................... 95
Manual Development Flow for RTL Kernels.........................................................................109
Designing RTL Recommendations........................................................................................ 113
Packaging an RTL Block as an RTL Kernel............................................................................114
Appendix A: Getting Started with Examples...............................................116
Installing Examples.................................................................................................................116
Using Local Copies.................................................................................................................. 118
Appendix B: Directory Structure........................................................................ 120
Command Line........................................................................................................................ 120
GUI............................................................................................................................................ 122
Appendix C: SLR Assignments for Kernels ...................................................124
Specifying SLR Assignment Information for a Platform Design....................................... 124
Guidelines for Kernels that Access Multiple Memory Banks............................................. 125
Appendix D: Managing Platforms and Repositories...............................129
Appendix E: JTAG Fallback for Private Debug Network.........................131
JTAG Fallback Steps................................................................................................................. 131
Appendix F: Installing, Programming, and Debugging Boards........132
Debugging and Troubleshooting a Board........................................................................... 138
Appendix G: Additional Resources and Legal Notices........................... 147
Xilinx Resources.......................................................................................................................147
UG1023 (v2018.2) June 20, 2018 www.xilinx.com [placeholder text]
SDAccel Environment User Guide 4
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