Created for verification teams developing complex system-level environments, Cadence
®
Incisive
®
Enterprise Simulator simplifies and accelerates your workflow. Its blend of leading-edge process
automation technology, high-performance engines, power analysis, and advanced debug
capabilities—integrated with the Incisive platform—helps you verify the most complex chips and
systems. With support for all IEEE-standard languages, Si2’s Common Power Format, and the
comprehensive Plan-to-Closure Methodology, Incisive Enterprise Simulator improves productivity,
project predictability, and product quality, helping you take the risk out of verification.
Incisive Enterprise Simulator
Multi-language simulation for low-power, metric-driven,
mixed-signal verification
Figure 1: Incisive Enterprise Simulator combines Incisive Enterprise Specman
®
Simulator, SimVision, Desktop Manager, Verification Builder,
Scenario Builder, eAnalyzer, and the Plan-to-Closure Methodology in a single optimized package. Engineers can “hot-swap” the state of the
software-based simulation in and out of the Incisive Xtreme
®
series of accelerators and emulators for additional performance. System-level
capabilities include a connection to Incisive Software Extensions and support for testbench acceleration with Palladium
®
XP.
Plan-to-Closure
Methodology
Verification Environment
Interface Specification and
Functional Testbench
Legacy Code (C, HDL)
Verification Environment
Reference Models and Tests
vPlan
Executable
Specification
Planning and
Management
High-Throughput
Connection to
Acceleration
and Emulation
Include
Embedded
Software in the
Simulation
Multi-Language
Automation
and Reuse
Assertion-Based
Verification
Full-System
Verification
Plan- and
Metric-Driven
Closure
Methodology
Libraries
GUI-Based UVC Construction
and Configuration
Verification Builder
GUI-Based Test Creation
Scenario Builder
Plan-Driven
Multi-Run Control
with Total Coverage
Analysis
Desktop Manager Specman + Design Team Simulator Core
Debug and Analysis
SimVision
Specman TBA
System Level
Incisive
Software
Extensions
Incisive
Acceleration
and Emulation
HDLs Assertions CPF
Specification
Embedded
Software
Device Under Test
Static Analysis and
Methodology Enforcement
eAnalyzer
Incisive Enterprise Simulator
Constrain-Driven
Test Generation
e
, Verilog, VHDL,
SystemC, SystemVerilog, CPF
PSL, OVL, SVA, Simulation
Code, Assertion, Functional
and Transaction Coverage
HDL Analysis
and Lint
Single-Run Data
and Assertion
Checking
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