GL3520 Datasheet
©2011 Genesys Logic, Inc. - All rights reserved. Page 4
Table of Contents
CHAPTER 1 GENERAL DESCRIPTION....................................................................... 7
CHAPTER 2 FEATURES..................................................................................................8
CHAPTER 3 PIN ASSIGNMENT..................................................................................... 9
3.1 Pinout..............................................................................................................................9
3.2 Pin Descriptions...........................................................................................................11
CHAPTER 4 BLOCK DIAGRAM..................................................................................14
CHAPTER 5 FUNCTION DESCRIPTION ...................................................................15
5.1 General Description ....................................................................................................15
5.1.1 USB 2.0 USPORT Transceiver...........................................................................15
5.1.2 USB 3.0 USPORT Transceiver...........................................................................15
5.1.3 PLL (Phase Lock Loop) ...................................................................................... 15
5.1.4 Regulator..............................................................................................................15
5.1.5 SPI Engine............................................................................................................15
5.1.6 RAM/ROM/CPU..................................................................................................15
5.1.7 UTMI (USB 2.0 Transceiver Microcell Interface)............................................15
5.1.8 SIE (Serial Interface Engine).............................................................................. 15
5.1.9 Control/Status Register.......................................................................................15
5.1.10 Power Management Engine..............................................................................16
5.1.11 Router/Aggregator Engine................................................................................ 16
5.1.12 REPEATER .......................................................................................................16
5.1.13 TT........................................................................................................................ 16
5.1.14 CDP Control Logic............................................................................................18
5.1.15 USB 3.0/USB 2.0 DSPORT Transceiver..........................................................18
5.2 Configuration and I/O Settings.................................................................................. 19
5.2.1 RESET Setting.....................................................................................................19
5.2.2 PGANG Setting.................................................................................................... 20
5.2.3 SELF/BUS Power Setting ...................................................................................21
5.2.4 LED Connections.................................................................................................21
5.2.5 Power Switch Enable Polarity............................................................................ 21
5.2.6 Port Number Configuration ...............................................................................22
5.2.7 Non-removable Port Configuration................................................................... 22
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