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VITA-42-0-Standard-for-XMC(原版-非影印图片版本)
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VITA
PO Box 19658, Fountain Hills, AZ 85269
PH: 480-837-7486
Email: info@vita.com, URL: http://www.vita.com
Approved ANSI Standard
STANDARD FOR VITA 42.0
XMC
Abstract
This document defines an open standard for supporting high-speed, switched
interconnect protocols on an existing, widely deployed mezzanine card form factor.!
!
Approved December 2008
American National Standards Institute, Inc.
!
American
National
Standard
Approval of an American National Standard requires verification by
ANSI that the requirements for due process, consensus, and other
criteria for approval have been met by the standards developer.
Consensus is established when, in the judgment of the ANSI Board of
Standards Review, substantial agreement has been reached by directly
and materially affected interests. Substantial agreement means much
more than a simple majority, but not necessarily unanimity. Consensus
requires that all views and objections be considered, and that a
concerted effort be made toward their resolution.
The use of American National Standards is completely voluntary; their
existence does not in any respect preclude anyone, whether he has
approved the standards or not, from manufacturing, marketing,
purchasing, or using products, processes, or procedures not conforming
to the standards.
The American National Standards Institute does not develop standards
and will in no circumstances give an interpretation of any American
National Standard. Moreover, no person shall have the right or
authority to issue an interpretation of an American National Standard in
the name of the American National Standard Institute. Requests for
interpretations should be addressed to the secretariat or sponsor whose
name appears on the title page of this standard.
CAUTION NOTICE: This American National Standard may be revised
or withdrawn at any time. The procedures of the American National
Standards Institute require that action be taken periodically to reaffirm,
revise, or withdraw this standard. Purchases of American National
Standards may receive current information on all standard by calling or
writing the American National Standards Institute.
Published by
VITA
PO Box 19658, Fountain Hills, AZ 85269
Copyright © 2008 by VITA
All rights reserved.
No part of this publication may be reproduced in any form, in an electronic retrieval system
or otherwise, without prior written permission of the publisher.
Printed in the United States of America - R1.0
ISBN 1-885731-49-3
ANSI/VITA 42.0 - 2008
Copyright 2008 VITA Page 3 of 42
Working Group
The following people contributed to the development of this standard. Their participation is
appreciated.
Ray Alderman VITA Observer
Randy Banton Mercury Computer Systems, Inc. Participant
Steve Belvin ISBi Participant
Lee Brown Dy 4 Systems Inc. Participant
Gorky Chin VISTA Controls Corporation Observer
Danny Cohen Sun Microsystems Participant
Dick DeBock Thales Computers Participant
Paul Dozier TEK Microsystems Editor
Chris Eckert SBS Technologies, Inc Participant
Barry Ensten Radstone Participant
Michael Franco Artesyn Communication Products Participant
Jeff Harris Motorola Computer Group Observer
John Hill Sun Microsystems Participant
Timothy Ho Motorola Semiconductor Product Sector Participant
Frank Hom APW Electronic Solutions Participant
Aaron Kaiway Spectrum Signal Processing Participant
Tony Lavely Mercury Computer Systems, Inc. Sponsor
Mike Macpherson MITRE Corporation Sponsor
Joe Norris Technobox, Inc. Participant
Bill Northey FCI Electronics Participant
Gregory Novak Motorola Computer Group Sponsor / Chair
Elwood Parsons Foxconn Electronics Sponsor
Bob Patterson Tyco Electronics Participant
David Pepper VMIC, A GE Fanuc Company Participant
Robert Persons Motorola Computer Group Participant
Andrew Reddig TEK Microsystems Sponsor / Chair
Mac Rush Motorola Computer Group Participant
John Rynearson VITA Participant
Mark Schell FCI Electronics Observer
Holger Schubert MEN Mikro Electronik GMBH Participant
Ivan Straznicky Dy 4 Systems Inc. Participant
Bob Sullivan Hybricon Corporation Participant
Bruce Thomas VISTA Controls Corporation Participant
Larry Thompson NAVSEA Crane Division Observer
Robert Tufford Motorola Computer Group Participant
Frank Van Hooft Spectrum Signal Processing Participant
Randy White Dy 4 Systems Inc. Participant
Henry Wong Motorola Computer Group Participant
Comments, Corrections, or Additions
Comments, corrections, or additions to this proposed standard may be forwarded to:
Technical Director
VITA
PO Box 19658
Fountain Hills, AZ 85269
Ph: 480-837-7486
Email: techdir@vita.com
VSO and Other Standards
Information about other standards being developed by VSO as well as Product Directories, VME
Handbooks, and general information about the embedded market is available from the VITA
office listed on the front cover.
ANSI/VITA 42.0 - 2008
Copyright 2008 VITA Page 4 of 42
1.0 Introduction ................................................................................. 7
1.1 Objective .....................................................................................................7
1.2 XMC Overview ............................................................................................7
1.3 Terminology................................................................................................8
1.3.1 XMC Definitions .....................................................................................8
1.3.2 Specification Key Words........................................................................8
1.4 References..................................................................................................9
1.5 Dimensions...............................................................................................10
2.0 Compliance................................................................................ 11
3.0 Mezzanine Cards....................................................................... 12
3.1 Overview ...................................................................................................12
3.2 Single-Width Mezzanine Cards ...............................................................14
3.3 Double-Width Mezzanine Cards..............................................................16
3.4 Populating Optional PMC Connector Areas ..........................................17
3.5 Populating Optional XMC Connector Areas ..........................................17
3.6 Conduction Cooling.................................................................................18
4.0 Carrier Board............................................................................. 19
4.1 Overview ...................................................................................................19
4.2 Connector Configurations.......................................................................22
4.3 Populating Optional PMC Connector Areas ..........................................22
4.4 Populating Optional XMC Connector Areas ..........................................22
5.0 XMC Connector ......................................................................... 25
5.1 Pin Definitions for Primary XMC Connectors........................................25
ANSI/VITA 42.0 - 2008
Copyright 2008 VITA Page 5 of 42
5.2 Pin Definitions for Secondary XMC Connectors...................................28
5.2.1 Fabric Mode Pin Usage for XMC Secondary Connectors ...................28
5.2.2 User I/O Mode Pin Usage for XMC Secondary Connectors ................28
5.3 JTAG Signals............................................................................................29
5.4 IPMI Support .............................................................................................30
5.5 Connector Pads and Labeling.................................................................30
5.6 Connector Assembly ...............................................................................31
5.7 Signal Routing and Electrical..................................................................31
5.8 Power Consumption and Heat Dissipation............................................32
5.8.1 Carrier Voltage.....................................................................................32
5.8.2 Power Sequencing...............................................................................33
6.0 Identification.............................................................................. 34
6.1 Labels........................................................................................................34
6.2 Label Locations........................................................................................34
6.3 Identification Block ..................................................................................34
7.0 Compatibility Issues ................................................................. 36
7.1 Mechanical Interoperability.....................................................................36
7.2 Electrical Interoperability ........................................................................36
7.3 System Interoperability ...........................................................................36
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