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ARM Cortex-M for Beginners_v3
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更新于2023-05-26
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Cortex-M开发入门白皮书,ARM公司专家Joseph Yiu(没错就是写Cortex-M权威指南那本书的作者)写得,白皮书中简要对比了M0/M0+/M1/M3/M4/M7/M23/M33的差异,使人一目了然
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White paper
Copyright © 2013-2017 ARM Limited or its affiliates. All rights reserved.
Page 1 of 28
ARM Cortex-M for Beginners
An overview of the ARM Cortex-M processor family
and comparison
Joseph Yiu, Senior Embedded Technology Manager, ARM
March 2017
White paper
Copyright © 2013-2017 ARM Limited or its affiliates. All rights reserved.
Page 2 of 28
Abstract
The ARM Cortex-M family now has eight processors. In this paper, we compare the features of various Cortex-M
processors and highlight considerations for selecting the correct processor for your application. The paper includes
detailed comparisons of the Cortex-M instruction sets and advanced interrupt capabilities, along with system-level
features, debug and trace features, and performance comparisons.
1 Overview
Today, there are eight members in the ARM Cortex-M processor family. In addition, there are many other ARM
processors in the ARM product portfolio. For many beginners, or even for experienced chip designers who are not
familiar with ARM architecture, this can be a bit confusing. Different processors can have different instruction set
support, system features and performance. In this article, I am going to capture the key differences between various
Cortex-M processors, and how they compare to other ARM processors.
1.1 The ARM processor family
Over the years, ARM has developed quite a number of different processor products. In the following diagram (Figure 1),
the ARM processors are divided between the classic ARM processors and the newer Cortex processor product range.
In addition, these processors are divided into three groups based on the application spaces:
Application Processors – High-end processors for mobile computing, smart phone, servers, etc. These processors
run at higher clock frequency (over 1GHz), and support Memory Management Unit (MMU), which is required for full
feature OS such as Linux, Android, MS Windows and mobile OSs. If you are planning to develop a product that requires
one of these OSs, you need to use an application processor.
Real-time Processors – These are very high-performance processors for real-time applications such as hard disk
controller, automotive power train and base band control in wireless communications. Most of these processors do not
have MMU, and usually have Memory Protection Unit (MPU), cache, and other memory features designed for industrial
applications. They can run at a fairly high clock frequency (e.g. 200MHz to >1GHz) and have very low response latency.
Although these processors cannot run full versions of Linux or Windows, there are plenty of Real Time Operating
Systems (RTOS) that can be used with these processors.
Microcontroller Processors – These processors are usually designed to have a much lower silicon area, and much
high-energy efficiency. Typically, they have shorter pipeline, and usually lower maximum frequency (although you can
find some of these processors running at over 200MHz). At the same time, the newer Cortex-M processor family is
designed to be very easy to use; therefore, they are very popular in the microcontroller and deeply embedded systems
market.
White paper
Copyright © 2013-2017 ARM Limited or its affiliates. All rights reserved.
Page 3 of 28
Application
Processors
(with MMU,
support Linux,
MS mobile OS)
Real Time
Processors
Microcontrollers
and deeply
embedded
System capability &
performance
ARM7
TM
series
ARM920T
TM
,
ARM940T
TM
ARM946
TM
,
ARM966
TM
ARM926
TM
Cortex-M3
Cortex-M1
(FPGA)
Cortex-M0
Cortex-M0+
Cortex-M4
Cortex-R4
Cortex-R5
Cortex-R7
Cortex-A8
Cortex-A9
Cortex-A5
Cortex-A15
Cortex-A7
ARM Cortex ProcessorsClassic ARM Processors
Cortex-A57
Cortex-A53
Cortex-A12
ARM11
TM
series
Cortex-R8
Cortex-A17
Cortex-A72
Cortex-A73
Cortex-A32
Cortex-A35
Cortex-R52
Cortex-M7
Cortex-M23
Cortex-M33
Figure 1: ARM processor family
Table 1 summarizes the main characteristics of the three processor ranges.
Application processors
Real-time processors
Microcontroller processors
Design
High clock frequency,
Long pipeline,
High performance,
Multimedia support (NEON
instruction set extension)
High clock frequency,
Long to medium pipeline
length, Deterministic (low
interrupt latency)
Usually shorter pipeline,
Ultra-low-power,
Deterministic (low interrupt
latency)
System
features
Memory Management Unit
(MMU), cache memory,
ARM TrustZone® security
extension
Memory Protection Unit
(MPU), cache memory,
Tightly Coupled Memory
(TCM)
Memory Protection Unit
(MPU), Nested Vectored
Interrupt Controller (NVIC),
Wakeup Interrupt Controller
(WIC), ARM TrustZone®
security extension in latest
designs.
Target
markets
Mobile computing, smart
phones,
energy-efficient servers,
high-end microprocessors
Industrial microcontrollers,
automotives,
Hard disk controllers,
Baseband modem
Microcontrollers,
Deeply embedded systems
(e.g. sensors, MEMS, mixed
signal IC), Internet of Things
(IoT)
Table 1: Summary of processor characteristics
White paper
Copyright © 2013-2017 ARM Limited or its affiliates. All rights reserved.
Page 4 of 28
1.2 The Cortex-M processor family
The Cortex-M processor family is more focused on the lower end of the performance scale. However, these
processors are still quite powerful when compared to other typical processors used in most microcontrollers. For
example, the Cortex-M4 and Cortex-M7 processors are being used in many high-performance microcontroller
products, with maximum clock frequency going up to 400MHz.
Of course, performance is not the only factor when selecting a processor. In many applications, low power and cost are
the key selection criteria. Therefore, the Cortex-M processor family contains various products to address different
needs:
Processor
Descriptions
Cortex-M0
A very small processor (starting from 12K gates) for low cost, ultra low power microcontrollers and
deeply embedded applications
Cortex-M0+
The most energy-efficient processor for small embedded system. Similar size and programmer’s
model to the Cortex-M0 processor, but with additional features like single cycle I/O interface and
vector table relocations
Cortex-M1
A small processor design optimized for FPGA designs and provides Tightly Coupled Memory (TCM)
implementation using memory blocks on the FPGAs. Same instruction set as the Cortex-M0
Cortex-M3
A small but powerful embedded processor for low-power microcontrollers that has a rich instruction
set to enable it to handle complex tasks quicker. It has a hardware divider and Multiply-Accumulate
(MAC) instructions. In addition, it also has comprehensive debug and trace features to enable
software developers to develop their applications quicker
Cortex-M4
It provides all the features on the Cortex-M3, with additional instructions target at Digital Signal
Processing (DSP) tasks, such as Single Instruction Multiple Data (SIMD) and faster single cycle MAC
operations. In addition, it also have an optional single precision floating point unit that support IEEE
754 floating point standard
Cortex-M7
High-performance processor for high-end microcontrollers and processing intensive applications. It
has all the ISA features available in Cortex-M4, with additional support for double-precision floating
point, as well as additional memory features like cache and Tightly Coupled Memory (TCM)
Cortex-M23
A small processor for ultra-low power and low cost designs, similar to the Cortex-M0+ processor,
but with various enhancements in instruction set and system-level features. It also supports the
TrustZone security extension.
Cortex-M33
A mainstream processor design, similar to previous Cortex-M3 and Cortex-M4 processors, but with
much better flexibility in system design, better energy efficiency and higher performance. It also
supports the TrustZone security extension.
Table 2: The Cortex-M processor family
Quite different from legacy ARM processors (e.g. ARM7TDMI, ARM9), the Cortex-M processors have a very different
architecture. For instance:
- Only support ARM Thumb® instructions, which have been extended to support both 16-bit and 32-bit
instructions in Thumb-2.
- Interrupt handling is managed by a built-in interrupt controller called Nested Vector Interrupt Controller
(NVIC), which provides automatic prioritization, masking and nesting of interrupts and system exceptions.
- Interrupt handlers can be written as normal C functions and the vectored interrupt handling mechanism avoided
the need to use software to determine which interrupt to service. At the same time, interrupt responses are
deterministic and have low latency.
White paper
Copyright © 2013-2017 ARM Limited or its affiliates. All rights reserved.
Page 5 of 28
- Vector table changed from branch instructions to starting addresses of interrupts and system exception
handlers.
- The register bank and some details of the programmer’s model have also been changed.
The changes mean many old assembly code written for classic ARM processors would need modifications, and old
projects need to be modified and recompiled when migrated to the Cortex-M world. Detailed information on software
porting is documented in an ARM document:
ARM Cortex-M3 Processor Software Development for ARM7TDMI Processor Programmers
http://www.arm.com/files/pdf/Cortex-M3_programming_for_ARM7_developers.pdf
1.3 Common features in Cortex-M processors
There are many similarities between the Cortex-M0, M0+, M3, M4 and M7 processors. For example:
- Baseline programmer’s model (section 3.1)
- Nested Vectored Interrupt Controller (NVIC) for interrupt management
- Architectural defined sleep modes : sleep and deep sleep (section 4.1)
- OS support features (section 3.3)
- Debug support (section 6)
- Ease of use
For example, the NVIC is an integrated interrupt controller.
NVIC
SysTick
(System Tick
Timer)
Peripherals
NMI
IRQs
Cortex-M
processor
Core
Configuration
registers
Internal bus interconnect
System
exceptions
Bus interface
Peripheral
Figure 2: NVIC in Cortex-M processor
The NVIC supports a number of interrupt inputs from peripherals, a Non-Maskable Interrupt request, an interrupt
request from a built-in timer called SysTick (see section3.3) and a number of system exceptions. The NVIC handles the
priority management and masking of these interrupt and exceptions.
More information on NVIC and the exception model is covered in section3.2. Other areas of similarity and difference
are covered in the rest of this document.
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