5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC1V8
VCC3V3
POWER ON RESET
MIO[5]
MIO[8] =1 ----MIO bank1 voltage=1.8V
MIO[7] =0 ----MIO bank0 voltage=3.3V
MIO[6] =0 ----PLL used
MIO[2] =0 ----cascaded JTAG
MIO[3] =0 ----JTAG/NAND/Quad-SPI/SD
BOOT OPTION
(QSPI_D3)
(QSPI_D2 )
MIO[4]
Boot Mode
JTAG 0 0
01
0
1
1
1
NAND
QSPI-FLASH
SD Card
JTAG
QSPI
SD
PS_POR_B
QSPI_CS
QSPI_D0
QSPI_D1
QSPI_D2
QSPI_D3
PS_MIO7
PS_MIO9
PS_MIO10
PS_MIO11
PS_MIO12
MIO13_LED
PS_MIO14
PS_MIO15
PS_POR_B
QSPI_CLK
PS_MIO8
ETH_TXCK
ETH_TXD0
ETH_TXD1
ETH_TXD2
ETH_TXD3
ETH_TXCTL
ETH_RXCK
ETH_RXD0
ETH_RXD1
ETH_RXD2
ETH_RXD3
ETH_RXCTL
OTG_DATA4
OTG_DIR
UART_TX
OTG_STP
OTG_NXT
OTG_DATA0
OTG_DATA1
OTG_DATA2
OTG_DATA3
OTG_CLK
OTG_DATA5
OTG_DATA6
OTG_DATA7
SD_CMD
SD_D0
SD_D1
SD_D2
SD_D3
UART_RX
MIO_KEY1
MIO_KEY2
ETH_MDC
ETH_MDIO
PS_SRST_B
QSPI_D0
QSPI_D1
PS_MIO7
QSPI_SCK
PS_MIO8
QSPI_D2
MIO0_LED
PS_SRST_B
OTG_RESETN
SD_CD
QSPI_D3
SD_CLK
VCC3V3
VCC3V3VCC3V3
VCC1V8
VCC3V3
VCC3V3
VCC1V8
VCC3V3
QSPI_D0
11
QSPI_D1
11
QSPI_CS
11
QSPI_CLK
11
QSPI_D3
11
QSPI_D2
11
PS_MIO9
15
PS_MIO10
15
PS_MIO11
15
PS_MIO14
15
PS_MIO8
15
PS_POR_B
9
PS_MIO15
15
PS_MIO7
15
PS_MIO12
15
MIO13_LED
12
MIO0_LED
12
OTG_RESETN
10
SD_CLK
10
SD_CMD
10
SD_D0
10
SD_D1
10
SD_D2
10
SD_D3
10
SD_CD
10
UART_TX
10
UART_RX
10
MIO_KEY1
10
MIO_KEY2
10
ETH_MDC
10
ETH_MDIO
10
ETH_TXCK
10
ETH_TXD0
10
ETH_TXD1
10
ETH_TXD2
10
ETH_TXD3
10
ETH_TXCTL
10
ETH_RXCK
10
ETH_RXD0
10
ETH_RXD1
10
ETH_RXD2
10
ETH_RXD3
10
ETH_RXCTL
10
OTG_DATA4
10
OTG_DIR
10
OTG_STP
10
OTG_NXT
10
OTG_DATA0
10
OTG_DATA1
10
OTG_DATA2
10
OTG_DATA3
10
OTG_CLK
10
OTG_DATA5
10
OTG_DATA6
10
OTG_DATA7
10
Title
Size Document Number Rev
Date: Sheet
of
AX7020 开发板原理图
1.0
Zynq-7000 PS MIO
416Thursday, December 08, 2016
Title
Size Document Number Rev
Date: Sheet
of
AX7020 开发板原理图
1.0
Zynq-7000 PS MIO
416Thursday, December 08, 2016
Title
Size Document Number Rev
Date: Sheet
of
AX7020 开发板原理图
1.0
Zynq-7000 PS MIO
416Thursday, December 08, 2016
R25
1K 1%
R15 20K
BANK500
U1B
Zynq7010/7020
PS_MIO0_500
E6
PS_MIO1_500
A7
PS_MIO2_500
B8
PS_MIO3_500
D6
PS_MIO4_500
B7
PS_MIO5_500
A6
PS_MIO6_500
A5
PS_MIO7_500
D8
PS_MIO8_500
D5
PS_MIO9_500
B5
PS_MIO10_500
E9
PS_MIO11_500
C6
PS_MIO12_500
D9
PS_MIO13_500
E8
PS_MIO14_500
C5
PS_MIO15_500
C8
PS_POR_B_500
C7
PS_CLK_500
E7
R87 40.2 1%
C25
0.1uF
R14 33R
C26
0.01uF
BANK501
U1C
Zynq7010/7020
PS_MIO_VREF_501
E11
PS_MIO16_501
A19
PS_MIO17_501
E14
PS_MIO18_501
B18
PS_MIO19_501
D10
PS_MIO20_501
A17
PS_MIO21_501
F14
PS_MIO22_501
B17
PS_MIO23_501
D11
PS_MIO24_501
A16
PS_MIO25_501
F15
PS_MIO26_501
A15
PS_MIO27_501
D13
PS_MIO28_501
C16
PS_MIO29_501
C13
PS_MIO30_501
C15
PS_MIO31_501
E16
PS_MIO32_501
A14
PS_MIO33_501
D15
PS_MIO34_501
A12
PS_MIO35_501
F12
PS_MIO36_501
A11
PS_MIO37_501
A10
PS_MIO38_501
E13
PS_MIO39_501
C18
PS_MIO40_501
D14
PS_MIO41_501
C17
PS_MIO42_501
E12
PS_MIO43_501
A9
PS_MIO44_501
F13
PS_MIO45_501
B15
PS_MIO46_501
D16
PS_MIO47_501
B14
PS_MIO48_501
B12
PS_MIO49_501
C12
PS_MIO50_501
B13
PS_MIO51_501
B9
PS_MIO52_501
C10
PS_MIO53_501
C11
PS_SRST_B_501
B10
C27
0.1uF
X1
33.333333Mhz
OE
1
GND
2
OUT
3
VDD
4
R16 20K
KEY1
Button
P1
1
P2
2
R26
1K 1%
R22
1K
R17 20K
R18 20K
R20 33R
J13
4 HEADER
1
2
3
4
R27
NC
U7
TCM811TERCTR
GND
1
#RESET
2
#MR
3
VDD
4
R28
10K
R0603
R23 20K
R21
10K
R19 20K
R24 20K
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