Intel® 82579 Gigabit Ethernet PHY — Datasheet
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9.7 Statistics Registers ............................................................................................89
9.8 PCIe Registers...................................................................................................91
9.9 General Registers ..............................................................................................94
9.10 Wake Up Registers.............................................................................................97
9.11 LPI MMD PHY Registers..................................................................................... 107
10.0 Non-Volatile Memory (NVM) .................................................................................. 109
10.1 Introduction .................................................................................................... 109
10.2 NVM Programming Procedure Overview ..............................................................109
10.3 LAN NVM Format and Contents .......................................................................... 111
11.0 Time Synch (IEEE1588 and 802.1AS).....................................................................129
11.1 Overview ........................................................................................................129
12.0 Intel
®
6 Series Express Chipset MAC Programming Interface................................. 137
13.0 Reference Schematics............................................................................................ 225
14.0 Schematic and Board Layout Checklists ................................................................. 227
15.0 Models ...................................................................................................................229
16 Design Considerations and Guidelines (Non-Mobile Designs).................................232
16.1 PHY Overview.................................................................................................. 233
16.2 Platform LAN Design Guidelines ......................................................................... 236
16.3 PCH – SMBus/PCIe LOM Design Guidelines .......................................................... 244
16.4 SMBus Design Considerations ............................................................................ 245
16.5 General Layout Guidelines................................................................................. 246
16.6 Layout Considerations ......................................................................................246
16.7 Guidelines for Component Placement.................................................................. 246
16.8 MDI Differential-Pair Trace Routing for LAN Design............................................... 249
16.9 Signal Trace Geometry ..................................................................................... 249
16.10 Trace Length and Symmetry ............................................................................. 252
16.11 Impedance Discontinuities ................................................................................ 253
16.12 Reducing Circuit Inductance ..............................................................................253
16.13 Signal Isolation ............................................................................................... 253
16.14 Power and Ground Planes ................................................................................. 254
16.15 Traces for Decoupling Capacitors ....................................................................... 256
16.16 Ground Planes under a Magnetics Module............................................................ 256
16.17 Light Emitting Diodes .......................................................................................258
16.18 Frequency Control Device Design Considerations.................................................. 258
16.19 Crystals and Oscillators .................................................................................... 259
16.20 Quartz Crystal .................................................................................................259
16.21 Fixed Crystal Oscillator ..................................................................................... 259
16.22 Crystal Selection Parameters .............................................................................260
16.23 Vibrational Mode..............................................................................................260
16.24 Nominal Frequency .......................................................................................... 260
16.25 Frequency Tolerance ........................................................................................ 260
16.26 Temperature Stability and Environmental Requirements........................................260
16.27 Calibration Mode..............................................................................................261
16.28 Load Capacitance............................................................................................. 261
16.29 Shunt Capacitance ........................................................................................... 262
16.30 Equivalent Series Resistance .............................................................................262
16.31 Drive Level ..................................................................................................... 262
16.32 Aging ............................................................................................................. 262
16.33 Reference Crystal ............................................................................................ 262
16.34 Oscillator Support ............................................................................................ 264
16.35 Oscillator Placement and Layout Recommendations ..............................................264
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